Signal interfacing techinques to simplify integrated circuit radio designs

• US 7,058,383 B2
• Filed: 12/15/2003
• Issued: 06/06/2006
• Est. Priority Date: 05/30/2003
• Status: Expired due to Fees

• Current Assignee: IPR Licensing Incorporated (InterDigital, Inc.)
• Original Assignee: IPR Licensing Incorporated (InterDigital, Inc.)
• Inventors: Toner, Michael F., Sugar, Gary L., Masucci, Robert M.
• Primary Examiner(s): Vuong, Quochien B.
• Application Number:
  US10/707,447
• Publication Number:
  US 20040242183A1
• Time in Patent Office: 904 Days
• Field of Search: 455/73, 455/78, 455/84, 455/333, 455/550.1, 375/219, 375/289, 375/320, 375/322
• US Class Current: 455/333
• CPC Class Codes: H04B 1/40 Circuits
• CPC Class Codes: H04L 7/0008 Synchronisation information channels, e.g. clock distribution lines

Abstract

A signal interfacing technique for connecting signals between a signal processing device and a radio integrated circuit (IC) involving multiplexing two or more signals on a connection pin between the radio IC and a signal processing device. According to one technique, transmit and receive signals are multiplexed such that during a transmit mode a transmit signal is coupled on the connection pin from the signal processing device to the radio IC, and during a receive mode a receive signal is coupled from the radio IC on the connection pin to the signal processing device. According to another technique, in-phase (I) and quadrature (Q) signals are multiplexed on a connection pin during both transmit and receive modes.

Claims

1. A method for connecting signals between a radio integrated circuit (IC) and a signal processing device comprising the step of multiplexing two or more signals on a connection pin between the radio IC and the signal processing device;

wherein in a transmit mode, the step of multiplexing comprises multiplexing a transmit in-phase (I) signal and a transmit quadrature (Q) signal on a connection pin between the radio IC and the signal processing device, and;

wherein in a receive mode, the step of multiplexing comprises multiplexing a receive in-phase (I) signal and a receive quadrature (Q) signal on a connection pin between the radio IC and the signal processing device.

2. The method of claim 1, wherein the step of multiplexing comprises multiplexing transmit and receive signals on the connection pin such that during a transmit mode a transmit signal is coupled on the connection pin from the signal processing device to the radio IC, and during a receive mode a receive signal is coupled from the radio IC on the connection pin to the signal processing device.

3. The method of claim 2, wherein the step of multiplexing is performed on each of a plurality of connection pins between the radio IC and the signal processing device for a plurality of corresponding transmit and receive signals.

4. The method of claim 2, wherein the step of multiplexing is performed on each of a pair of connection pins associated with differential transmit signals and differential receive signals.

5. A radio transceiver integrated circuit (IC) comprising:

a. at least one transmitter and at least one receiver, each of which includes an in-phase (I) signal path and a quadrature (Q) signal path;

b. a transmitter connection pin on which a transmit I signal and a transmit Q signal are multiplexed for connection to the respective I and Q signal paths of the transmitter; and

c. a receiver connection pin on which a receive I signal and a receive Q signal are multiplexed from the respective I and Q signal paths of the receiver.

6. The radio IC of claim 5, and further comprising a first multiplexer circuit that couples from the transmitter connection pin the transmit I and transmit Q signals during different time intervals for connection to the I and Q signal paths, respectively, of the transmitter.

7. The radio IC of claim 6, wherein the first multiplexer circuit alternately couples the transmit I and transmit Q signals, respectively, from the transmitter pin to the I and Q signal paths, respectively, of the transmitter.

8. The radio IC of claim 6, and further comprising a second multiplexer circuit that couples during different time intervals the receive I and receive Q signals to the receiver connection pin from the I and Q signal paths, respectively, of the receiver.

9. The radio IC of claim 8, wherein the second multiplexer circuit alternately couples the receive I and receive Q signals to the receiver connection pin from the I and Q paths, respectively, of the receiver.

10. The radio IC of claim 5, and further comprising a multiplexer circuit that during a receive mode couples to the receiver connection pin the receive I and receive Q signals during different time intervals from the I and Q signal paths, respectively, of the receiver, and during a transmit mode, couples from the transmitter connection pin the transmit I and transmit Q signals during different time intervals to the I and Q signal paths, respectively of the transmitter.

11. The radio IC of claim 10, and further comprising a timing circuit that supplies a timing signal to the multiplexer circuit to control the timing of the first and second multiplexer circuits.

12. The radio IC of claim 5, and further comprising a plurality of transmitters and a plurality of receivers such that a pair of a transmitter and a receiver are associated with a corresponding one of a plurality of antennas connected to the radio IC, and further comprising a plurality of transmitter connection pins each associated with a corresponding transmitter and a plurality of receiver connection pins each associated with a corresponding receiver, each transmitter connection pin on which corresponding transmit I and transmit Q signals are multiplexed for connection to the I and Q signal paths, respectively, of the associated transmitter and each receiver connection pin on which corresponding receive I and receive Q signals are multiplexed for connection from the I and Q signal paths, respectively, of the associated receiver.

13. The radio IC of claim 12, and further comprising a plurality of transmitter multiplexer circuits each associated with a corresponding transmitter to multiplex the corresponding transmit I signal and transmit Q signal from the corresponding transmitter connection pin to the respective I and Q signal paths of the corresponding transmitter.

14. The radio IC of claim 13, wherein each transmitter multiplexer circuit alternately couples the corresponding transmit I signal and transmit Q signal from the corresponding transmitter connection pin to the respective I and Q signal paths of the corresponding transmitter.

15. The radio IC of claim 12, and further comprising a plurality of receiver multiplexer circuits each associated with a corresponding receiver to multiplex the corresponding receive I signal and receive Q signal from the respective signal paths of the corresponding receiver to the corresponding receiver connection pin.

16. The radio IC of claim 15, wherein each receiver multiplexer circuit alternately couples the corresponding receive I and receive Q signal to the corresponding receiver connection pin from the respective I and Q signal paths of the corresponding receiver.

17. The radio IC of claim 12, and further comprising a plurality of multiplexer circuits each associated with a corresponding transmitter/receiver pair that multiplexes the corresponding transmit I signal and transmit Q signal from the corresponding transmitter connection pin to the respective I and Q signal paths of the corresponding transmitter, and that multiplexes the corresponding receive I signal and receive Q signal from the respective I and Q signal paths of the corresponding receiver to the corresponding receiver connection pin.

18. The radio IC of claim 12, wherein each of the I and Q signal paths of each the of transmitters and receivers having differential signal paths, and further comprising a plurality of pairs of transmitter connection pins on which corresponding differential transmit I and transmit Q signals are multiplexed, and a plurality of pairs of receiver connection pins on which corresponding differential receive I and receive Q signals are multiplexed.

19. The radio IC of claim 5, wherein each of the I and Q signal paths of the transmitter and receiver are differential, and further comprising a pair of transmitter connection pins on which differential transmit I and transmit Q signals are multiplexed, and a pair of receiver connection pins on which differential receive I and receive Q signals are multiplexed.

20. The radio IC of claim 19, and further comprising a plurality of transmitters and a plurality of receivers such that a pair of a transmitter and a receiver are associated with a corresponding one of a plurality of antennas connected to the radio IC, and further comprising a plurality of pairs of transmitter connection pins each pair associated with a corresponding transmitter and a plurality of pairs of receiver connection pins each pair associated with a corresponding receiver, each pair of transmitter connection pins on which corresponding differential transmit I and transmit Q signals are multiplexed to the I and Q signal paths, respectively, of the associated transmitter and each pair of receiver connection pin on which corresponding differential receive I and receive Q signals are multiplexed from the I and Q signal paths, respectively, of the associated receiver.

21. A system comprising the radio IC of claim 5, and further comprising a signal processing device coupled to the radio IC that supplies the transmit I signal and transmit Q signal to the radio IC for transmission processing and processes the receive I signal and receive Q signal from the radio IC.

22. The system of claim 21, and further comprising a timing circuit in the radio IC and a timing circuit in the signal processing device, wherein the timing circuit in the radio transceiver or timing circuit in the signal processing device generates timing signals that are coupled to the other timing circuit in order to coordinate the transfer of transmit I and transmit Q signals from the signal processing device to the radio IC and to coordinate transfer of the receive I and receive Q signals from the radio IC to the signal processing device.

23. The system of claim 22, wherein the radio IC further comprises at least one multiplexer circuit coupled to the timing circuit in the radio IC and is responsive to timing signals supplied by the timing circuit to couple from the transmitter connection pin the transmit I and transmit Q signals during different time intervals for connection to the I and Q signal paths, respectively, of the transmitter, and to couple to the receiver connection pin the receive I and receive Q signals during different time intervals from the I and Q signal paths, respectively, of the receiver.