Semiconductor integrated circuit and method of manufacturing the same
First Claim
Patent Images
1. A method of manufacturing a semiconductor integrated circuit comprising:
- forming a plurality of voltage-activated transistors in a semiconductor layer on a substrate having an insulator at least on a surface thereof, said plurality of voltage-activated transistors including body contact regions electrically connectable one of body regions being electrically isolated from each other and being electrically isolated from said substrate and a source region and having the same channel conduction type; and
electrically connecting said plurality of voltage-activated transistors in series to a power supply terminal and an output terminal, and to said source region and said body contact region of at least one of said plurality of voltage-activated transistors near said output terminal, a drain region and a gate electrode of at least one of said voltage-activated transistors near said output terminal being not electrically connected.
0 Assignments
0 Petitions
Accused Products
Abstract
A multi-input logic circuit (e.g. a 2-input NAND circuit) mounted on a semiconductor integrated circuit comprises a plurality of voltage-activated transistors which have the same channel conduction type and are electrically connected in series between a power supply terminal and an output terminal. A source region and a body region of at least the voltage-activated transistor connected to the output terminal are electrically connected and have substantially the same potential. The semiconductor integrated circuit has either an SOI or SOS structure.
-
Citations
1 Claim
-
1. A method of manufacturing a semiconductor integrated circuit comprising:
-
forming a plurality of voltage-activated transistors in a semiconductor layer on a substrate having an insulator at least on a surface thereof, said plurality of voltage-activated transistors including body contact regions electrically connectable one of body regions being electrically isolated from each other and being electrically isolated from said substrate and a source region and having the same channel conduction type; and electrically connecting said plurality of voltage-activated transistors in series to a power supply terminal and an output terminal, and to said source region and said body contact region of at least one of said plurality of voltage-activated transistors near said output terminal, a drain region and a gate electrode of at least one of said voltage-activated transistors near said output terminal being not electrically connected.
-
Specification