Schottky barrier diode and method of making the same

• US 7,064,408 B2
• Filed: 12/10/2003
• Issued: 06/20/2006
• Est. Priority Date: 12/10/2003
• Status: Expired due to Fees

• Current Assignee: Chip Integration Tech. Co., Ltd., Shye-Lin Wu
• Original Assignee: Chip Integration Tech. Co., Ltd., Shye-Lin Wu
• Inventors: Wu, Shye-Lin
• Primary Examiner(s): Smith, Bradley K.
• Assistant Examiner(s): Fulk, Steven J.
• Application Number:
  US10/731,503
• Publication Number:
  US 20050127464A1
• Time in Patent Office: 923 Days
• Field of Search: 257/471, 257/473, 257/475, 257/483, 257/484, 257/485, 438/534, 438/575, 438/576
• US Class Current: 257/484
• CPC Class Codes: H01L 27/0814 Diodes only
• CPC Class Codes: H01L 29/0692 Surface layout
• CPC Class Codes: H01L 29/66143 Schottky diodes
• CPC Class Codes: H01L 29/872 Schottky diodes

Abstract

A power Schottky rectifier device having pluralities of trenches are disclosed. The Schottky barrier rectifier device includes field oxide region having p-doped region formed thereunder to avoid premature of breakdown voltage and having a plurality of trenches formed in between field oxide regions to increase the anode area thereto increase forward current capacity or to shrinkage the planar area for driving the same current capacity. Furthermore, the trenches have rounded corners to alleviate current leakage and LOCOS region in the active region to relief stress during the bonding process. The processes for power Schottky barrier rectifier device including termination region formation need only three masks and thus can gain the benefits of cost down.

Claims

1. A power rectifier device, comprising:

an n−

drift layer formed on an n+ substrate;

a cathode metal layer formed on a surface of said n+ substrate opposite said n−

drift layer;

a pair of field oxide regions formed into said n−

drift layer, and said field oxide regions separated by a first mesa;

a pair of termination regions spaced, respectively, said pair of field oxide regions with a second mesa;

said first mesa and said second mesa having trenches formed into said n−

drift layer;

four p-type doped regions, respectively, right beneath each of said termination regions and said field oxide regions;

a barrier metal layer formed on sidewalls and bottom of said trenches, and formed on remnant portions of said first mesa and said second mesa; and

a top metal layer acted as an anode electrode formed on said barrier metal layer, said field oxide regions and extended to cover a portion of said termination regions.

2. The power rectifier device according to claim 1 wherein said barrier metal layer is formed from the group of Al, AlCu, AlSiCu, Ti, Ni, Cr. Mo, Pt, Zr, and W, Ti/TiN, etc.

3. The power rectifier device according to claim 1 wherein said top metal layer is formed of stack layers of Al, AlCu, AlSiCu or Ti/Ni/Ag.

4. A power rectifier device, comprising:

an n−

drift layer formed on an n+ substrate;

a cathode metal layer formed on a surface of said n+ substrate opposite said n−

drift layer;

a pair of field oxide regions formed into said n−

drift layer, and said field oxide regions separated by a first mesa;

a pair of termination regions spaced apart, said pair of field oxide regions with a second mesa;

said first mesa and said second mesa having trenches formed into said n−

drift layer;

four p-type doped regions, one of said termination regions and said field oxide regions are located on each of the four p-type doped regions;

a barrier metal layer formed on sidewalls and bottom of said trenches, and formed on remnant portions of said first mesa and said second mesa; and

a top metal layer acted as an anode electrode formed on said barrier metal layer, said field oxide regions and extended to cover a portion of said termination regions.