Data processors
First Claim
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1. A data processor comprising:
- (a) a correlation matrix memory arranged to store data;
(b) input means arranged to receive sets of input data to be stored in the correlation matrix memory;
(c) a sampler arranged to derive, from each set of input data, a respective set of tuples;
(d) a coder arranged to code each of the tuples by tensoring;
(e) a combiner arranged to combine the coded tuples for a respective set of input data;
(f) a separator generator arranged to generate for each set of input data a respective, associated, unique separator;
(g) storage means arranged to store the association of each separator with its respective set of input data; and
(h) addressing means arranged to applying to the correlation matrix memory, for each set of input data, the respective combined coded tuples as a row address and the respective unique separator as a column address, or vice-versa;
wherein said correlation matrix memory comprises a plurality of sub-correlation matrix memories;
said addressing means is arranged to access a first one of said sub-correlation matrix memories and apply the combined coded tuples of a respective set of input data to that sub-correlation matrix memory unless a respective row (or column) of that sub-correlation matrix memory will become saturated by application of those tuples; and
in the event of such prospective saturation, access successive ones of the sub-correlation matrix memories until those tuples can by applied to a respective one of the sub-correlation matrix memories without such saturation.
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Abstract
An input device receives sets of input data to be stored in a correlation matrix memory. A sampler derives, from each set of input data, a respective set of tuples, and a coder codes each of the tuples, which are then combined for the respective set of input data. A separator generator generates for each set of input data a respective, associated, unique separator, which is stored with its respective set of input data. For each set of input data, the respective combined coded tuples and the respective unique separator are applied to the correlation matrix memory as a row address and as a column address, or vice-versa.
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Citations
15 Claims
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1. A data processor comprising:
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(a) a correlation matrix memory arranged to store data; (b) input means arranged to receive sets of input data to be stored in the correlation matrix memory; (c) a sampler arranged to derive, from each set of input data, a respective set of tuples; (d) a coder arranged to code each of the tuples by tensoring; (e) a combiner arranged to combine the coded tuples for a respective set of input data; (f) a separator generator arranged to generate for each set of input data a respective, associated, unique separator; (g) storage means arranged to store the association of each separator with its respective set of input data; and (h) addressing means arranged to applying to the correlation matrix memory, for each set of input data, the respective combined coded tuples as a row address and the respective unique separator as a column address, or vice-versa; wherein said correlation matrix memory comprises a plurality of sub-correlation matrix memories;
said addressing means is arranged to access a first one of said sub-correlation matrix memories and apply the combined coded tuples of a respective set of input data to that sub-correlation matrix memory unless a respective row (or column) of that sub-correlation matrix memory will become saturated by application of those tuples; and
in the event of such prospective saturation, access successive ones of the sub-correlation matrix memories until those tuples can by applied to a respective one of the sub-correlation matrix memories without such saturation. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method of processing data, comprising the steps of:
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(a) receiving sets of input data to be stored in a correlation matrix memory; (b) deriving, from each set of input data, a respective set of tuples; (c) coding each of the tuples; (d) combining the coded tuples for a respective set of input data; (e) generating for each set of input data a respective, associated, unique separator; (f) storing the association of each separator with its respective set of input data; (g) applying to the correlation matrix memory, for each set of input data, the respective combined coded tuples as a row address and the respective unique separator as a column address, or vice-versa; (h) receiving sets of query data to be matched with sets of input data stored in the correlation matrix memory; (i) deriving, for each set of query data, a respective set of coded tuples analogous to those derived for the original input data; (j) applying to the correlation matrix memory, for each set of query data, the respective combined coded tuples as a row (or column) address; (k) outputting a raw superimposed separator which represents, for a respective set of query data, the number of rows (or columns) having a bit set by the applied combined coded tuples in each column (or row) represented by the raw superimposed separator; (l) converting the raw superimposed separator into a binary superimposed separator; (m) extracting one or more individual separator from the binary superimposed separator; and (n) identifying the or each respective original set of input data from association with the or each individual separator extracted from the binary superimposed separator. - View Dependent Claims (10)
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11. A data processor comprising:
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(a) a correlation matrix memory arranged to store data; (b) input means arranged to receive sets of input data to be stored in the correlation matrix memory; (c) a sampler arranged to derive, from each set of input data, a respective set of tuples; (d) a coder arranged to code each of the tuples by tensoring; (e) a combiner arranged to combine the coded tuples for a respective set of input data; (f) a separator generator arranged to generate for each set of input data a respective, associated, unique separator; (g) storage means arranged to store the association of each separator with its respective set of input data; and (h) addressing means arranged to applying to the correlation matrix memory, for each set of input data, the respective combined coded tuples as a row address and the respective unique separator as a column address, or vice-versa; wherein the data processor is arranged to receive sets of query data to be matched with sets of input data stored in the correlation matrix memory, and to derive, for each set of query data, a respective set of coded tuples analogous to those derived for the original input data, and to apply to the correlation matrix memory, for each set of query data, the respective combined coded tuples as a row (or column) address;
the data processor further comprising;(i) output means for outputting a raw superimposed separator which represents, for a respective set of query data, the number of rows (or columns) having a bit set by the applied combined coded tuples in each column (or row) represented by the raw superimposed separator; (j) threshold means arranged to convert the raw superimposed separator into a binary superimposed separator; and (k) an extractor arranged to extract individual separators from the binary superimposed separator. - View Dependent Claims (12, 13, 14, 15)
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Specification