Method for manufacturing semiconductor integrated circuit device
First Claim
1. A semiconductor integrated circuit device comprising:
- a first MISFET on a first region of a main surface of a semiconductor substrate; and
a second MISFET on a second region of the main surface of the semiconductor substrate, wherein the first MISFET has a first sidewall spacer formed over the sidewall of a first gate electrode, of the first MISFET, wherein the first MISFET has a silicon nitride film formed between the first sidewall spacer and the first gate electrode, wherein a gate insulation film of the first MISFET comprises a first insulation film having a relative dielectric constant higher than that of silicon nitride, wherein a gate insulation film of the second MISFET comprises a second insulation film including silicon oxide, and wherein a film thickness, converted to that of a silicon oxide film, of the first insulation film is thinner than a film thickness, converted to that of a silicon oxide film, of the second insulation film.
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Accused Products
Abstract
A two-type gate process is suitable for forming a gate insulation film partially formed of a high dielectric film, for example, a titanium oxide film (gate insulation film of the internal circuit) having a relative dielectric constant larger than that of silicon nitride on a substrate, and a silicon nitride film is deposited on the titanium oxide film. The silicon nitride film will prevent oxidation of the titanium oxide film when the surface of the substrate is subjected to thermal oxidation in the next process step. Next, the silicon nitride film and the titanium oxide film on the I/O circuit region are removed, while the silicon nitride film and the titanium oxide film on the internal circuit region remain, and the substrate is subjected to thermal oxidation to form a silicon oxide film as a gate insulation film on the surface of the I/O circuit region.
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Citations
27 Claims
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1. A semiconductor integrated circuit device comprising:
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a first MISFET on a first region of a main surface of a semiconductor substrate; and
a second MISFET on a second region of the main surface of the semiconductor substrate, wherein the first MISFET has a first sidewall spacer formed over the sidewall of a first gate electrode, of the first MISFET, wherein the first MISFET has a silicon nitride film formed between the first sidewall spacer and the first gate electrode, wherein a gate insulation film of the first MISFET comprises a first insulation film having a relative dielectric constant higher than that of silicon nitride, wherein a gate insulation film of the second MISFET comprises a second insulation film including silicon oxide, and wherein a film thickness, converted to that of a silicon oxide film, of the first insulation film is thinner than a film thickness, converted to that of a silicon oxide film, of the second insulation film. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A semiconductor integrated circuit device comprising:
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a first MISFET on a first region of a main surface of a semiconductor substrate; and
a second MISFET on a second region of the main surface of the semiconductor substrate, wherein a gate insulation film of the first MISFET comprises a first insulation film having a relative dielectric constant higher than that of silicon nitride, wherein a gate insulation film of the second MISFET comprises a second insulation film including silicon oxide, wherein, in a gate length direction, the length of the first gate electrode of the first MISFET is narrower than the length of the first gate insulation film, and wherein a film thickness, converted to that of a silicon oxide film, of the first insulation film is thinner than a film thickness, converted to that of a silicon oxide film, of the second insulation film. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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21. A semiconductor integrated circuit device comprising:
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a first MISFET on a first region of a main surface of a semiconductor substrate; and
a second MISFET on a second region of the main surface of the semiconductor substrate, wherein the first MISFET has a first sidewall spacer formed over the sidewall of a first gate electrode, of the first MISFET, wherein the first MISFET has a silicon nitride film formed between the first sidewall spacer and the first gate electrode, wherein a gate insulation film of the first MISFET comprises a first insulation film having a relative dielectric constant higher than 8, wherein a gate insulation film of the second MISFET comprises a second insulation film including silicon oxide, and wherein a film thickness, converted to that of a silicon oxide film, of the first insulation film is thinner than a film thickness, converted to that of a silicon oxide film, of the second insulation film. - View Dependent Claims (22, 23, 24)
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25. A semiconductor integrated circuit device comprising:
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a first MISFET on a first region of a main surface of a semiconductor substrate; and
a second MISFET on a second region of the main surface of the semiconductor substrate, wherein a gate insulation film of the first MISFET comprises a first insulation film having a relative dielectric constant higher than 8, wherein a gate insulation film of the second MISFET comprises a second insulation film including silicon oxide, wherein, in a gate length direction, the length of the first gate electrode of the first MISFET is narrower than the length of the first gate insulation film, and wherein a film thickness, converted to that of a silicon oxide film, of the first insulation film is thinner than a film thickness, converted to that of a silicon oxide film, of the second insulation film. - View Dependent Claims (26, 27)
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Specification