Data transfer control system, electronic instrument, and data transfer control method

• US 7,069,350 B2
• Filed: 07/24/2003
• Issued: 06/27/2006
• Est. Priority Date: 08/05/2002
• Status: Expired due to Fees

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Kanai, Hiroyuki, Ito, Akemi, Fujita, Shinichiro
• Primary Examiner(s): Dang, Khanh
• Application Number:
  US10/625,685
• Publication Number:
  US 20040128405A1
• Time in Patent Office: 1,069 Days
• Field of Search: 710/22, 710/27, 710/33, 710/35, 710/104, 710/105, 710/110, 710/305, 710/306, 710/308, 710/313
• US Class Current: 710/22
• CPC Class Codes: G06F 13/28 using burst mode transfer, e.g. direct memory access DMA, cycle steal G06F13/32 takes precedence

Abstract

A data transfer control system receives a command packet ORB (SBP-2) transferred through a bus BUS1 (IEEE1394), and issues a command included in the ORB to a device connected with a bus BUS2 (ATA (IDE)/ATAPI). The data transfer control system sets a sufficiently large fixed DMA data length irrespective of the type of the issued command, and instructs start of DMA transfer to or from the device connected with the bus BUS2. The data transfer control system aborts the DMA transfer when a device connected with BUS2 informs of completion of command processing. As the fixed DMA data length, a value greater than a storage capacity of a storage or a value greater than a data length which can be designated by a command is employed. The data transfer control system issues a command included in the ORB to a device connected with the bus BUS2 without decoding the command.

Claims

1. A data transfer control system for transferring data through a bus, comprising:

a command processing section which receives a command packet transferred through a first bus and issues a command included in the command packet to a device connected with a second bus; and

a Direct Memory Access (DMA) transfer instruction section which sets a fixed DMA data length irrespective of type of the issued command and instructs start of DMA transfer to or from the device connected with the second bus,

wherein the device connected with the second bus is a device which writes data transferred through the second bus in a storage or reads data to be transferred through the second bus from the storage, and

wherein the DMA transfer instruction section sets a value greater than a storage capacity of the storage as the fixed DMA data length.

2. The data transfer control system as defined in claim 1,

wherein the DMA transfer instruction section aborts the started DMA transfer when the device which is connected with the second bus and has received the issued command informs of completion of command processing.

3. The data transfer control system as defined in claim 1,

wherein the DMA transfer instruction section instructs start of the DMA transfer when the device which is connected with the second bus and has received the issued command requests start of the DMA transfer.

4. The data transfer control system as defined in claim 1,

wherein the command processing section issues a command included in the command packet to the device connected with the second bus without decoding the command.

5. The data transfer control system as defined in claim 1,

wherein the first bus is a bus through which data is transferred according to a first interface standard and the second bus is a bus through which data is transferred according to a second interface standard, and

wherein the command packet is a packet defined by a higher layer protocol of the first interface standard.

6. An electronic instrument comprising:

the data transfer control system as defined in claim 1; and

the device connected with the second bus.

7. A data transfer control system for transferring data through a bus, comprising:

a command processing section which receives a command packet transferred through a first bus and issues a command included in the command packet to a device connected with a second bus; and

a Direct Memory Access (DMA) transfer instruction section which sets a fixed DMA data length irrespective of type of the issued command and instructs start of DMA transfer to or from the device connected with the second bus,

wherein the DMA transfer instruction section sets a value greater than a data length which is capable of being designated by a command included in the command packet as the fixed DMA data length.

8. A data transfer control system for transferring data through a bus, comprising:

a command processing section which receives a command packet transferred through a first bus and issues a command included in the command packet to a device connected with a second bus; and

a Direct Memory Access (DMA) transfer instruction section which sets a fixed DMA data length irrespective of type of the issued command and instructs start of DMA transfer to or from the device connected with the second bus,

wherein the first bus is a bus through which data is transferred according to the IEEE1394 standard and the second bus is a bus through which data is transferred according to the AT Attachment (ATA)/ATA Packet Interface (ATAPD standard, and

wherein the command packet is an ORB packet defined by the Serial Bus Protocol-2 (SBP-2).

9. A data transfer control method for transferring data through a bus, the method comprising:

receiving a command packet transferred through a first bus and issuing a command included in the command packet to a device connected with a second bus; and

setting a fixed Direct Memory Access (DMA) data length irrespective of type of the issued command and instructing start of DMA transfer to or from the device connected with the second bus,

wherein the device connected with the second bus is a device which writes data transferred through the second bus in a storage or reads data to be transferred through the second bus from the storage, and

wherein the method further comprises setting a value greater than a storage capacity of the storage as the fixed DMA data length.

10. The data transfer control method as defined in claim 9, further comprising:

aborting the started DMA transfer when the device connected with the second bus which has received the issued command informs of completion of command processing.

11. The data transfer control method as defined in claim 9, further comprising:

instructing start of the DMA transfer when the device connected with the second bus which has received the issued command requests start of the DMA transfer.

12. The data transfer control method as defined in claim 9, further comprising:

issuing a command included in the command packet to the device connected with the second bus without decoding the command.

13. The data transfer control method as defined in claim 9,

wherein the first bus transfers data conforming to a first interface standard and the second bus transfers data conforming to a second interface standard, and

wherein the command packet is a packet defined by a higher layer protocol of the first interface standard.

14. A data transfer control method for transferring data through a bus, the method comprising:

receiving a command packet transferred through a first bus and issuing a command included in the command packet to a device connected with a second bus;

setting a fixed Direct Memory Access (DMA) data length irrespective of type of the issued command and instructing start of DMA transfer to or from the device connected with the second bus; and

setting a value greater than a data length which is capable of being designated by a command included in the command packet as the fixed DMA data length.

15. A data transfer control method for transferring data through a bus, the method comprising:

receiving a command packet transferred through a first bus and issuing a command included in the command packet to a device connected with a second bus; and

setting a fixed Direct Memory Access (DMA) data length irrespective of type of the issued command and instructing start of DMA transfer to or from the device connected with the second bus,

wherein the first bus transfers data conforming to the IEEE1394 standard and the second bus transfers data conforming to the AT Attachment (ATA)/ATA Packet Interface (ATAPI) standard, and

wherein the command packet is an operation request block (ORB) packet defined by the Serial Bus Protocol-2 (SBP-2).

16. A data transfer control system for transferring data through a bus, comprising:

a command processing section which receives a command packet transferred through a first bus and issues a command included in the command packet to a device connected with a second bus; and

a Direct Memory Access (DMA) transfer instruction section which sets a fixed DMA data length irrespective of type of the issued command and instructs start of DMA transfer to or from the device connected with the second bus,

wherein the command processing section omits decode processing of a command for calculating a size of a DMA data length and issues the command to the device connected with the second bus, the command being included in the command packet which is transferred through the first bus,

wherein the first bus is a bus through which data is transferred according to the IEEE1394 standard and the second bus is a bus through which data is transferred according to the AT Attachment (ATA)/ATA Packet Interface (ATAPI) standard, and

wherein the command packet is an ORB packet defined by the Serial Bus Protocol-2 (SBP-2).

17. The data transfer control system as defined in claim 16,

wherein the DMA transfer instruction section aborts the started DMA transfer when the device which is connected with the second bus and has received the issued command informs of completion of command processing.

18. The data transfer control system as defined in claim 16,

wherein the first bus is a bus through which data is transferred according to a first interface standard and the second bus is a bus through which data is transferred according to a second interface standard, and

wherein the command packet is a packet defined by a higher layer protocol of the first interface standard.

19. A data transfer control method for transferring data through a bus, the method comprising:

receiving a command packet transferred through a first bus and issuing a command included in the command packet to a device connected with a second bus;

setting a fixed Direct Memory Access (DMA) data length irrespective of type of the issued command and instructing start of DMA transfer to or from the device connected with the second bus; and

omitting decode processing of a command for calculating a sizes of a DMA data length and issuing the command to the device connected with the second bus, the command being included in the command packet which is transferred through the first bus,

wherein the first bus transfers data conforming to the IEEE1394 standard and the second bus transfers data conforming to the AT Attachment (ATA)/ATA Packet Interface (ATAPI) standard, and

wherein the command packet is an operation recluest block (ORB) packet defined by the Serial Bus Protocol-2 (SBP-2).

20. The data transfer control method as defined in claim 19, further comprising:

aborting the started DMA transfer when the device connected with the second bus which has received the issued command informs of completion of command processing.

21. The data transfer control method as defined in claim 19,

wherein the first bus transfers data conforming to a first interface standard and the second bus transfers data conforming to a second interface standard, and

wherein the command packet is a packet defined by a higher layer protocol of the first interface standard.