Method for forming a thin, high quality buffer layer in a field effect transistor and related structure

• US 7,071,051 B1
• Filed: 01/20/2004
• Issued: 07/04/2006
• Est. Priority Date: 01/20/2004
• Status: Active Grant

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Clark-Phelps, Robert B., Jeon, Joong S., Xiang, Qi, Zhong, Huicai
• Primary Examiner(s): Pham, Long
• Application Number:
  US10/761,009
• Time in Patent Office: 896 Days
• Field of Search: 438/197, 438/216, 438/585
• US Class Current: 438/216
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 29/51 Insulating materials associated therewith for MIS structures on thin film semiconductor H01L29/4908
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

According to one exemplary embodiment, a method for forming a field-effect transistor on a substrate comprises a step of forming a buffer layer on the substrate, where the buffer layer comprises ALD silicon dioxide. The buffer layer can be formed by utilizing a silicon tetrachloride precursor in an atomic layer deposition process, for example. The buffer layer comprises substantially no pin-hole defects and may have a thickness, for example, that is less than approximately 5.0 Angstroms. The method further comprises forming a high-k dielectric layer over the buffer layer. The high-k dielectric layer may be, for example, hafnium oxide, zirconium oxide, or aluminum oxide. According to this exemplary embodiment, the method further comprises forming a gate electrode layer over the high-k dielectric layer. The gate electrode layer may be polycrystalline silicon, for example.

Claims

1. A method of forming a field-effect transistor on a substrate, said method comprising steps of:

utilizing a silicon tetrachloride precursor in an atomic layer deposition process to form a buffer layer on said substrate;

forming a high-k dielectric layer over said buffer layer, said high-k dielectric layer being selected from the group consisting of hafnium oxide, zirconium oxide, and aluminum oxide.

2. The method of claim 1 further comprising a step of forming a gate electrode layer over said high-k dielectric layer.

3. The method of claim 1 wherein said buffer layer comprises substantially no pin-hole defects.

4. The method of claim 1 wherein said buffer layer has a thickness less than approximately 5.0 Angstroms.

5. The method of claim 2 wherein said gate electrode layer comprises polycrystalline silicon.

6. A method for forming a field effect transistor on a substrate, said method comprising a step of forming a buffer layer on said substrate, said method being characterized by:

utilizing a silicon tetrachloride precursor in an atomic layer deposition process to form said buffer layer on said substrate;

forming a high-k dielectric layer on said buffer layer, said high-k dielectric layer being selected from the group consisting of hafnium oxide, zirconium oxide, and aluminum oxide.

7. The method of claim 6 further comprising a step of forming a gate electrode layer over said high-k dielectric layer.

8. The method of claim 6 wherein said buffer layer comprises substantially no pin-hole defects.

9. The method of claim 6 wherein said buffer layer has a thickness less than approximately 5.0 Angstroms.

10. The method of claim 7 wherein said gate electrode layer comprises polycrystalline silicon.