Serial interface for a data storage array

• US 7,073,022 B2
• Filed: 05/23/2002
• Issued: 07/04/2006
• Est. Priority Date: 05/23/2002
• Status: Expired due to Fees

• Current Assignee: Altera Law Group, LLC, International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Liong, Thomas Sing-Klat, El-Batal, Mohamad H., Surugucchi, Krishnakumar Rao, Fujie, Yoshihiro
• Primary Examiner(s): Padmanabhan, Mano
• Assistant Examiner(s): Rojas, Midys
• Application Number:
  US10/155,315
• Publication Number:
  US 20030221061A1
• Time in Patent Office: 1,503 Days
• Field of Search: 711/114
• US Class Current: 711/114
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices
• CPC Class Codes: G06F 3/0613 in relation to throughput
• CPC Class Codes: G06F 3/0658 Controller construction arrangements
• CPC Class Codes: G06F 3/0689 Disk arrays, e.g. RAID, JBOD

Abstract

The present invention describes a method and system for interfacing a plurality of device controllers to an array of data storage devices by serial connection. The device controllers are coupled to a serial interface by a bus and the devices of the storage array are coupled to the serial interface by a serial connection. The serial interface receives controller signals through the bus and multiplexes the signals onto the serial connections of the storage array. Arbitration between the various device controllers seeking access to the storage array is resolved through bus protocol and through drive based reserve/release registers in the serial interface processor.

Claims

1. A method of data storage, comprising:

coupling a plurality of Serial Advanced Technology Attachment (S-ATA) data storage devices with a plurality of device controllers via a plurality of multi-controller switching interfaces, wherein each of the multi-controller switching interfaces serially couples to S-ATA data storage devices via serial connections, each of the multi-controller switching interfaces having a plurality of connection points configured to couple with a plurality of S-ATA data storage devices; and

transferring data between the plurality of S-ATA data storage devices and the device controllers coupled to the plurality of multi-controller switching interfaces via the plurality of connection points;

wherein coupling the plurality of device controllers to the plurality of multi-controller switching interfaces further comprises;

coupling a plurality of inputs of a multiplexer to serial outputs of the plurality of device controllers;

serially coupling the multi-controller switching interfaces in a one-to-one ratio to each of the plurality of S-ATA data storage devices; and

switching the plurality of inputs of the multiplexer to allow each of the plurality of device controllers to gain access to each S-ATA data storage device in the array.

2. The method of claim 1 further comprising configuring the plurality of S-ATA data storage devices as a redundant array of individual disks (RAID) array.

3. The method of claim 1, wherein the number of the plurality of device controllers is two device controllers arranged in an active-active configuration.

4. The method of claim 1 further comprising providing a communication link between the plurality of device controllers, wherein data may be transferred between the plurality of device controllers.

5. The method of claim 1, wherein coupling the plurality of device controllers to the plurality of S-ATA data storage devices further comprises:

coupling the plurality of device controllers and plurality of multi-controller switching interface to a bus;

coupling each S-ATA data storage device to one of the plurality of multi-controller switching interfaces by a serial connection; and

arbitrating access to the bus for data transfer between components coupled to the bus though a bus protocol.

6. The method of claim 5 further comprising configuring the bus as a peripheral component interface (PCI) bus.

7. The method of claim 5, wherein the number of the plurality of multi-controller switching interfaces is two and each interface is coupled to a portion of the S-ATA data storage devices.

8. The method of claim 5 further comprising using a plurality of reserve/release registers to indicate the accessibility of the S-ATA data storage devices.

9. The method of claim 5 further comprising configuring the plurality of multi-controller switching interfaces as components of an active midplane.

10. A system for data storage, comprising:

a plurality of S-ATA data storage devices;

a plurality of device controllers; and

a plurality of multi-controller switching interfaces, wherein each of the plurality of multi-controller switching interfaces serially couples to S-ATA data storage devices via a serial connection, each of the plurality of multi-controller switching interfaces having a plurality of connection points configured to connect to the plurality of device controllers for transferring data between the S-ATA data storage devices serially connected to the plurality of multi-controller switching interfaces and the plurality of device controllers;

wherein the plurality of device controllers and the plurality of multi-controller switching interfaces is coupled by a bus, wherein the plurality of multi-controller switching interfaces further comprises a plurality of bridges for coupling the bus to the plurality of multi-controller switching interfaces, a plurality of processors coupled to the plurality of bridges for arbitration and control functions of the one or more multi-controller switching interfaces and a plurality of physical layer interfaces for coupling the plurality of multi- controller switching interfaces to the plurality of S-ATA data storage devices, and wherein each physical layer interface further comprises a control unit for controlling communication signals through the physical layer interface, a transmitter coupled to one S-ATA data storage device for transmitting data to the plurality of S-ATA data storage devices and a receiver coupled to the one S-ATA data storage device for receiving data from the one S-AlA data storage device.

11. The system of claim 10, wherein each of the plurality of S-ATA data storage devices is part of an array of parallel ATA data storage devices coupled to serializer/deserializer circuitry.

12. The system of claim 10, wherein each of the plurality of S-ATA data storage devices is part of a redundant array of individual disks (RAID) array.

13. The system of claim 10, wherein the plurality of multi-controller switching interfaces further comprises a plurality of multiplexers, wherein the plurality of multiplexers communicatively couple the plurality of S-ATA data storage devices to the plurality of device controllers.

14. The system of claim 13, wherein the plurality of multiplexers is located on a midplane.

15. The system of claim 13, wherein the plurality of multiplexers are a component of a plurality of S-ATA data storage device carriers, each of the plurality of S-ATA data storage device carriers including S-ATA data storage devices.

16. The system of claim 15, wherein the plurality of S-ATA data storage devices carriers are field replaceable units.

17. The system of claim 10, wherein the plurality of device controllers are arranged in an active-active configuration.

18. The system of claim 10, wherein each of the plurality of device controllers is coupled to a network by a Fibre Channel (FC) link.

19. The system of claim 10, wherein each of the plurality of device controllers is coupled to a network by an InfiniBand (IB) link.

20. The system of claim 10, wherein each of the plurality of device controllers is coupled to a network by a small computer system interface (SCSI) link.

21. The system of claim 10, wherein each of the plurality of device controllers further comprises a controller-to-controller communication/arbitration processor to control communication between a plurality of device controllers.

22. The system of claim 10 wherein the plurality of device controllers and the plurality of multi-controller switching interfaces is coupled by a peripheral component interface (PCI) bus.

23. The system of claim 10 further comprising bus control circuitry for arbitrating communication between the plurality of device controllers and the plurality of multi-controller switching interfaces.

24. The system of claim 10, wherein the plurality of multi-controller switching interfaces further comprises a plurality of reserve/release registers to indicate accessibility of the S-ATA data storage devices.

25. The system of claim 10, wherein each of the plurality of device controllers is a field replaceable unit.

26. The system of claim 10, wherein the plurality of multi-controller switching interfaces is located on a midplane.

27. The system of claim 10, wherein the plurality of multi-controller switching interfaces are field replaceable units.