Apparatus and method for incorporating the use of a processing device into a battery charger and tester

• US 7,076,375 B2
• Filed: 09/06/2002
• Issued: 07/11/2006
• Est. Priority Date: 06/27/2002
• Status: Active Grant

• Current Assignee: SPX Corporation
• Original Assignee: SPX Corporation
• Inventors: Raichle, Kurt, Xia, Weixing
• Primary Examiner(s): Hoff, Marc S.
• Assistant Examiner(s): Desta, Elias
• Application Number:
  US10/235,702
• Publication Number:
  US 20040002824A1
• Time in Patent Office: 1,404 Days
• Field of Search: 702/57, 702/63, 702/80, 702/FOR.103, 702/155, 702/156, 702/171, 320106-108, 439/919, 438/19, 324/426
• US Class Current: 702/63
• CPC Class Codes: G01R 31/386 using test-loads
• CPC Class Codes: H02J 7/00 Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
• CPC Class Codes: Y10S 439/919 for treatment by electrical current, e.g. magnet or battery charger, heater or welder

Abstract

A method and apparatus for charging and testing a battery wherein the battery is monitored throughout the process and loads are adjusted by a microprocessor based upon the data collected during the process. Furthermore, the microprocessor allows battery information to be collected and transmitted to a variety of sources.

Claims

1. A battery charger and tester apparatus comprising:

the battery charger and tester configured to apply a heavy load test to a battery; and

a field programmable gate array (FPGA) linked to the battery charger and tester, wherein the FPGA is configured to charge the battery by determining which portion of an input power sine wave to permit to pass to the battery.

2. The apparatus as in claim 1, wherein an image of the field programmable gate array is stored in a memory device.

3. The apparatus as in claim 2, wherein the memory device can be selected from a group consisting of flash memory, RAM, hard drive, other storage devices, and a combination thereof.

4. The apparatus as in claim 2, wherein the image is loaded into the FPGA upon start-up of the apparatus.

5. The apparatus as in claim 1, wherein the FPGA receives an input to charge a battery.

6. The apparatus as in claim 5, wherein the FPGA uses the input to regulate the charge to the battery.

7. The apparatus as in claim 6, wherein the FPGA uses the data input to determine the amount of output from a dc power source to pass to the battery.

8. The apparatus as in claim 1, wherein the FPGA regulates the charge or load applied to the battery.

9. The apparatus as in claim 1, further comprising a module port that is linked to the FPGA.

10. The apparatus as in claim 1, wherein the FPGA conducts testing procedures on the battery to analyze its charging ability.

11. The apparatus as in claim 10, wherein the testing procedures are based upon the type of battery.

12. The apparatus in claim 9, wherein the module port is selected from a group consisting of a communication module, a display module, an alphanumeric keypad module, a bar code module, a printer module, and memory module.

13. A method for charging and testing a battery, comprising:

applying a heavy load test to the battery;

measuring an effect on the battery due to applying the heavy load test;

transmitting data from the measurement and testing to a field programmable gate array (FPGA);

determining within the FPGA which portion of an input power sine wave to permit to pass to the battery; and

charging the battery using the portion of the input power sine wave permitted by the FPGA.

14. The method as in claim 13, further comprising the step of determining a battery type to determine a specific load to apply.

15. The method as in claim 14, further comprising the step of scanning battery data into the FPGA.

16. The method of claim 13, further comprising receiving an input to apply a specific load test to the battery.

17. The method of claim 16, further comprising determining which voltages to allow to pass to the battery based upon the input.

18. The method of claim 16, further comprising determining which current to allow to pass to the battery based upon the input.

19. An apparatus for charging and testing a battery, comprising:

means for applying a heavy load test to the battery;

means for testing the battery to determine if the battery can be recharged;

means for measuring the load'"'"'s effect on the battery;

means for transmitting data from the means for measuring and means for testing;

means for processing that includes a field programmable gate array (FPGA) that determines which portion of an input power sine wave to permit to pass to the battery; and

means for charging the battery using the portion of the input power sine wave permitted by the FPGA.

20. The apparatus as in claim 19, further comprising means for determining a battery type to determine a specific load test to apply.

21. The apparatus as in claim 20, further comprising means for scanning battery data into the means for processing.

22. The apparatus of claim 19, further comprising means for receiving an input to apply a specific load test to the battery.

23. The apparatus of claim 22, further comprising means for determining which voltages to allow to pass to the battery based upon the input.

24. The apparatus of claim 22, further comprising means for determining which current to allow to pass to the battery based upon the input.

25. A battery charger and tester apparatus comprising:

a battery charger configured to provide electrical power to charge a battery;

a battery tester, configured to apply a heavy load test to the battery;

a battery sensor, configured to measure an electrical property of the battery, whereby at least one of a level of charge in the battery, a capability of the battery to retain charge, and a capability of the battery to supply current is determined; and

a field programmable gate array (FPGA) electrically linked to the battery charger, the battery tester, and the battery sensor, configured to control operation of the battery charger and tester at least in part, wherein the FPGA is configured to control charging of the battery by determining which portion of an input power sine wave to permit to pass to the battery, and by applying to the battery the portion of the input power sine wave permitted by the FPGA.