Integrated PULSHI mode with shutdown
First Claim
1. A system comprising:
- a pulse width modulation (PWM) controller,wherein the PWM controller provides a first output for a high-side PWM signal and a second output for a low-side PWM signal; and
output stage,wherein the output stage is configured to receive the high-side signal from the first PWM controller output and the low-side signal from the second PWM controller output, andwherein the high-side signal is coupled to a high-side transistor through a pulse transformerwherein the output stage further comprises a third transistor, wherein the third transistor is coupled to receive the low-side signal and wherein the third transistor is configured to turn off the high-side transistor when the low-side signal is asserted.
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Accused Products
Abstract
Systems and methods for controlling amplification of a pair of pulse width modulated signals. In one embodiment, a system comprises an audio amplifier which is configured to receive a pulse code modulated (PCM) input signal, convert this signal to a pulse width modulated (PWM) signal in a controller, and amplify the PWM signal in an output stage. The controller separates the PWM signal into a high-side signal and a low-side signal. The controller incorporates digitally programmable delays into the processing paths for each of the high-side and low-side signals. The high-side and low-side signals are separately provided to the output stage. The separate high-side and low-side signals can be used to individually control (e.g., turn off) the high-side and low-side transistors. Circuitry is included to generate a short low-side pulse when both transistors are turned off in order to drain the gate charge from the high-side transistor.
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Citations
14 Claims
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1. A system comprising:
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a pulse width modulation (PWM) controller, wherein the PWM controller provides a first output for a high-side PWM signal and a second output for a low-side PWM signal; and output stage, wherein the output stage is configured to receive the high-side signal from the first PWM controller output and the low-side signal from the second PWM controller output, and wherein the high-side signal is coupled to a high-side transistor through a pulse transformer wherein the output stage further comprises a third transistor, wherein the third transistor is coupled to receive the low-side signal and wherein the third transistor is configured to turn off the high-side transistor when the low-side signal is asserted. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. An output stage for a PWM amplifier comprising:
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a first input for a high-side PWM signal and a second input for a low-side PWM signal; a first transistor coupled to receive the high-side PWM signal and a second transistor coupled to receive the low-side PWM signal; a pulse transformer coupled between the first input and the first transistor; and a third transistor coupled between the second input and the first transistor; wherein when a pulse is received at the first input, the first transistor is turned on, and when a pulse is received at the second input, the second transistor is turned on and the first transistor is turned off. - View Dependent Claims (12, 13, 14)
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Specification