16 QAM modulator and method of 16 QAM modulation

• US 7,078,981 B2
• Filed: 07/27/2004
• Issued: 07/18/2006
• Est. Priority Date: 07/27/2004
• Status: Active Grant

• Current Assignee: Lucent Technologies, Inc. (Nokia Corporation)
• Original Assignee: Lucent Technologies, Inc. (Nokia Corporation)
• Inventors: Farag, Emad N.
• Primary Examiner(s): MIS, DAVID C
• Application Number:
  US10/899,184
• Publication Number:
  US 20060022765A1
• Time in Patent Office: 721 Days
• Field of Search: 332103-105, 375/298, 375/308
• US Class Current: 332/103
• CPC Class Codes: H04L 27/3488 Multiresolution systems
• CPC Class Codes: H04L 27/362 Modulation using more than one carrier, e.g. with quadrature carriers, separately amplitude modulated H04L27/366 takes precedence
• CPC Class Codes: H04L 5/12 the signals being represented by different phase modulations of a single carrier

Abstract

In one embodiment, the 16-quadrature amplitude modulation QAM modulator includes a logic operation device performing a logic operation on first-fourth bits of received data to generate first and second logic outputs. A first quadrature phase shift keying QPSK modulator receives the first and second bits of received data and generates a first QPSK signal. A second QPSK modulator receives the first and second logic outputs and generates a second QPSK signal. A combiner combines the first and second QPSK signals to generate a 16-QAM signal.

Claims

1. A 16-quadrature amplitude modulation QAM modulator, comprising:

a logic operation device performing a logic operation on first-fourth bits of received data to generate first and second logic outputs;

a first quadrature phase shift keying QPSK modulator receiving the first and second bits of received data and generating a first QPSK signal;

a second QPSK modulator receiving the first and second logic outputs and generating a second QPSK signal; and

a combiner combining the first and second QPSK signals to generate a 16-QAM signal.

2. The modulator of claim 1, wherein the logic operation device performs an exclusive-NOR operation on the first and third bits of received data to generate the first logic output and performs an exclusive-NOR operation on the second and fourth bits of the received data to generate the second logic output.

3. The modulator of claim 2, wherein the first QPSK modulator and the second QPSK modulator are configured such that for a same input the first QPSK modulator generates the first QPSK signal having twice an amplitude of the second QPSK signal.

4. The modulator of claim 1, wherein the logic operation device is a digital signal processor.

5. The modulator of claim 4, wherein the first and second QPSK modulators are provided on an application specific integrated circuit ASIC.

6. The modulator of claim 1, wherein the logic operation device is a logic circuit.

7. The modulator of claim 1, wherein the first QPSK modulator and the second QPSK modulator are configured such that for a same input the first QPSK modulator generates the first QPSK signal having twice an amplitude of the second QPSK signal.

8. The modulator of claim 1, wherein the first and second QPSK modulators apply same channelization and scrambling codes in generating the first and second QPSK signals.

9. A 16-quadrature amplitude modulation QAM modulator, comprising:

a first quadrature phase shift keying QPSK modulator receiving first and second bits of data, and generating a first QPSK signal providing a course indication of a 16-QAM signal based on the first and second bits of data;

a second QPSK modulator receiving first and second inputs, and generating a second QPSK signal indicating a fine adjustment to the course indication of the 16-QAM signal based on the first and second inputs;

a logical operation device generating the first and second inputs from the first-fourth bits of received data; and

a combiner combining the first and second QPSK signals to generate the 16-QAM signal.

10. The modulator of claim 9, wherein

the first QPSK signal indicates at least a quadrant in the in-phase and quadrature-phase constellation plane for the 16-QAM signal;

and

the second QPSK signal indicates a displacement of the first QPSK signal within the quadrant.

11. The modulator of claim 10, wherein the first and second QPSK modulators are provided on an application specific integrated circuit ASIC.

12. The modulator of claim 11, wherein the logic operation device is a digital signal processor.

13. The modulator of claim 9, wherein the first QPSK modulator and the second QPSK modulator are configured such that for a same input the first QPSK modulator generates the first QPSK signal having twice an amplitude of the second QPSK signal.

14. The modulator of claim 9, wherein the logic operation device performs an exclusive-NOR operation on the first and third bits of received data to generate the first logic output and performs an exclusive-NOR operation on the second and fourth bits of the received data to generate the second logic output.

15. A method of 16-quadrature amplitude modulation QAM, comprising:

performing a logic operation on first-fourth bits of received data to generate first and second logic outputs;

generating a first quadrature phase shift keying QPSK signal based on the first and second bits of received data;

generating a second QPSK signal based on the first and second logic outputs; and

combining the first and second QPSK signals to generate a 16-QAM signal.

16. The method of claim 15, wherein the performing step comprises:

performing an exclusive-NOR operation on the first and third bits of received data to generate the first logic output; and

performing an exclusive-NOR operation on the second and fourth bits of the received data to generate the second logic output.

17. The method of claim 16, wherein the generating a first QPSK signal step generates the first QPSK signal having twice an amplitude of the second QPSK signal.

18. The method of claim 15, wherein the generating a first QPSK signal step generates the first QPSK signal having twice an amplitude of the second QPSK signal.

19. The method of claim 15, wherein the generating a first QPSK signal step and the generating a second QPSK signal step apply same channelization and scrambling codes in generating the first and second QPSK signals.

20. A method of 16-quadrature amplitude modulation QAM, comprising:

generating a first QPSK signal providing a course indication of a 16-QAM signal based on first and second bits of received data;

generating a second QPSK signal indicating a fine adjustment to the course indication of the 16-QAM signal based on first and second inputs;

generating the first and second inputs from the first-fourth bits of received data; and

combining the first and second QPSK signals to generate the 16-QAM signal.

21. The method of claim 20, wherein

the first QPSK signal indicates at least a quadrant in the in-phase and quadrature-phase constellation plane for the 16-QAM signal;

and

the second QPSK signal indicates a displacement of the first QPSK signal within the quadrant.

22. The method of claim 20, wherein the generating a first QPSK signal step generates the first QPSK signal having twice an amplitude of the second QPSK signal.

23. The method of claim 20, wherein the generating the first and second logic inputs step comprises:

performing an exclusive-NOR operation on the first and third bits of received data to generate the first logic input; and

performing an exclusive-NOR operation on the second and fourth bits of the received data to generate the second logic input.