High dynamic range active pixel CMOS image sensor and data processing system incorporating adaptive pixel reset
First Claim
Patent Images
1. A CMOS Active Pixel image sensor, comprising:
- an array of CMOS sensor pixels;
pixel addressing means, including a vertical scanner;
pixel read out means, including a horizontal scanner-buffer;
a reset register, including reset logic gates; and
a comparator, with an override capability, connected to the output of the CMOS sensor array, and said comparator compares the pixel output levels to a given reference level, wherein a digital output from the comparator is loaded into a reset register and is also supplied to a data processing system as a pixel digital sensor output.
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Abstract
A high Dynamic Range Active Pixel CMOS image sensor architecture has incorporated therein an adaptive pixel reset. The individual sensor pixels are reset only when accumulated charge, or the integration time exceeds certain predetermined limits. The reset is skipped when the integrated charge signal in a given pixel is low. The accumulated number of reset skips in a given time frame, together with the standard analog output, is used to calculate the sensor high DR output signal. A signal processing system is used to simultaneously process both sensor analog and digital outputs.
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Citations
11 Claims
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1. A CMOS Active Pixel image sensor, comprising:
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an array of CMOS sensor pixels; pixel addressing means, including a vertical scanner; pixel read out means, including a horizontal scanner-buffer; a reset register, including reset logic gates; and a comparator, with an override capability, connected to the output of the CMOS sensor array, and said comparator compares the pixel output levels to a given reference level, wherein a digital output from the comparator is loaded into a reset register and is also supplied to a data processing system as a pixel digital sensor output. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A CMOS Active Pixel image sensor, comprising:
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an array of CMOS sensor pixels; pixel addressing means, including a vertical scanner; pixel read out means, including a scanner-buffer; a reset register, including reset logic gates; a comparator, with an override capability, connected to the output of the CMOS sensor array, and said comparator compares the pixel output levels to a given reference level, wherein a digital output from the comparator is loaded into a reset register and is also supplied to a data processing system as a pixel digital sensor output; and pixels in said array that can be individually reset at different times independently of time of readout.
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Specification