Integrated digital loop carrier system with virtual tributary mapper circuit

• US 7,079,555 B2
• Filed: 11/05/2001
• Issued: 07/18/2006
• Est. Priority Date: 03/09/1993
• Status: Expired due to Fees

• Current Assignee: Pulse Communications, Inc. (Enginuity Communications Corporation)
• Original Assignee: Pulse Communications, Inc. (Enginuity Communications Corporation)
• Inventors: Carter, Nicholas, Tucker, Thomas, Moran, Michael, Renucci, Peter, Chen, Chung, Timbs, Jeffrey, Boudreaux, J. Bradley, Klonsky, Steven, Baydar, Ertugrul, Wardak, Waleed
• Primary Examiner(s): PHAM, BRENDA H
• Application Number:
  US09/985,686
• Publication Number:
  US 20020097743A1
• Time in Patent Office: 1,716 Days
• Field of Search: 370/532, 370/535, 370536-540
• US Class Current: 370/532
• CPC Class Codes: H04J 2203/0028 Local loop
• CPC Class Codes: H04J 2203/0041 Star, e.g. cross-connect, concentrator, subscriber group equipment, remote electronics
• CPC Class Codes: H04J 2203/0046 User Network Interface
• CPC Class Codes: H04J 2203/0048 Network termination, e.g. NT1, NT2, PBX
• CPC Class Codes: H04J 2203/006 Fault tolerance and recovery
• CPC Class Codes: H04J 3/1611 Synchronous digital hierarchy [SDH] or SONET H04J3/1664 takes precedence for interactions with OTN
• CPC Class Codes: H04L 41/0213 Standardised network management protocols, e.g. simple network management protocol [SNMP]
• CPC Class Codes: H04L 41/0226 Mapping or translating multiple network management protocols
• CPC Class Codes: H04L 41/046 comprising network management agents or mobile agents therefor
• CPC Class Codes: H04Q 11/0407 using a stored programme control
• CPC Class Codes: H04Q 2213/13003 Constructional details of switching devices
• CPC Class Codes: H04Q 2213/1301 Optical transmission, optical switches
• CPC Class Codes: H04Q 2213/13106 Microprocessor, CPU
• CPC Class Codes: H04Q 2213/13176 Common channel signaling, CCS7
• CPC Class Codes: H04Q 2213/13209 ISDN
• CPC Class Codes: H04Q 2213/13292 Time division multiplexing, TDM
• CPC Class Codes: H04Q 2213/1332 Logic circuits
• CPC Class Codes: H04Q 2213/13367 Hierarchical multiplexing, add-drop multiplexing
• CPC Class Codes: H04Q 2213/13381 Pair-gain system, digital loop carriers
• CPC Class Codes: H04Q 3/0095 Specification, development or application of network management software, e.g. software re-use

Abstract

An integrated digital loop carrier (IDLC) system includes digital line feeders and signal processors to interface with the feeders an to ultimately provide data to subscriber instruments. The system can be employed as a central office terminal (COT) or remote digital terminal (RDT) with analog, T1 or SONET feeders and any conventional link medium. Data are put in DS1 format and multiplexed onto token ring optical loops for delivery to banks of channel units wherein the optical signals are translated to electrical signals for delivery to the Cus and subscribers. A method and apparatus is provided for mapping and demapping signals between virtual tributaries (VT) and digital signal formats in the RDT of an integrated digital loop carrier. An application-specific circuit provides such mapping and demapping functions as Floating Byte Synchronous VT to Locked Byte Synchronous VT, Floating Asynchronous VT to Locked Byte Synchronous VT, Floating Asynchronous VT to Floating Asynchronous VT, DS1 to Locked Byte Synchronous VT, DS1 to Floating Asynchronous VT, and DS1 to Floating Byte Synchronous VT.

Claims

1. An apparatus for mapping signals between virtual tributaries and digital signal formats for transmission to and from customer instruments and a telecommunications system along optical and wire paths, comprising the combination of:

optical interface means for receiving optical signals, converting said optical signals into electrical signals and demultiplexing said electrical signals from an optical channel format to a synchronous transport signal, STS, format;

STS multiplexing means for receiving the demultiplexed STS signals and generating an output of parallel STS signals arranged in at least one virtual tributary group, VTG, comprising a selected number of virtual tributaries;

digital interface means for receiving digital signals from and transmitting digital signals to wire paths coupled to the telecommunications system and customer instruments;

VTG circuit means for mapping and demapping a virtual tributary group and configured to perform at least one mapping operation from a group of operations consisting of mapping at least one of said virtual tributaries to at least one of said digital signals, mapping at least one of said virtual tributaries to a different one of said virtual tributaries, and mapping at least one of said digital signals to at least one of said virtual tributaries;

channel unit means for receiving and processing said virtual tributary group and for delivering said virtual tributary group to predetermined customer instruments; and

a common equipment device and a channel device connected by an optical communication link;

wherein said optical interface means, said STS multiplexing means, and said VTG circuit means operate in said common equipment device, and said channel unit means operates in said channel device.

2. An apparatus according to claim 1, wherein said STS multiplexing means comprises means for sending loop-back signals for diagnosing faults in said optical interface means and said VTG circuit means.

4. An apparatus according to claim 1, further comprising a local area network, a local area network interface for each of a plurality of devices comprising said optical interface means, said STS multiplexing means, and said VTG circuit means, and signal processor means having a local area network interface for communicating with each of said plurality of devices.

3. An apparatus for handling communication signals comprising the combination of:

optical interface means for receiving optical signals, converting said optical signals into electrical signals and demultiplexing said electrical signals from an optical channel format to a synchronous transport signal, STS, format;

STS multiplexing means for receiving the demultiplexed STS signals and generating an output of parallel STS signals arranged in at least one virtual tributary group, VTG;

VTG circuit means for mapping and demapping a virtual tributary group;

channel unit means for receiving and processing said virtual tributary group and for delivering said virtual tributary group to predetermined customer instruments;

line interface circuit means comprising an input and an output for receiving and transmitting DS1 data streams, respectively, said line interface circuit means being operable to perform line decoding and clock recovery on received DS1 data streams; and

VT mapper means coupled to said line interface circuit means for mapping data from the received DS1 data streams to a virtual tributary in one direction of signal flow, and for demapping asynchronous or byte-synchronous virtual tributaries to DS1 data streams for transmission by said line interface circuit means in the opposite direction of signal flow.

5. An apparatus according to claim 3, wherein said STS multiplexing means comprises means for sending loop-back signals for diagnosing faults in said optical interface means and said VTG circuit means.

6. An apparatus according to claim 3, further comprising a local area network, a local area network interface for each of a plurality of devices comprising said optical interface means, said STS multiplexing means, and said VTG circuit means, and signal processor means having a local area network interface for communicating with each of said plurality of devices.

7. A VTG circuit for processing DS1 data streams and virtual tributary groups, and for interfacing with circuit means leading to channel units, the VTG circuit comprising the combination of:

line interface circuit means comprising an input and an output for receiving and transmitting DS1 data streams, respectively, said line interface circuit means being operable to perform line decoding and clock recovery on received DS1 data streams; and

virtual tributary mapper means coupled to said line interface circuit means for mapping data from the received DS1 data streams to virtual tributaries in one direction of signal flow, and to said circuit means leading to channel units for demapping asynchronous or byte-synchronous virtual tributaries therefrom to DS1 data streams for transmission by said line interface circuit means in the opposite direction of signal flow.

8. An apparatus for mapping signals between virtual tributaries and digital signal formats for transmission to and from subscriber equipment and a telecommunications system along optical and wire paths, comprising:

a first bus interface connected to said telecommunications system for receiving signals from and transmitting signals to an optical path in said telecommunications system which are formatted as synchronous transport signals comprising virtual tributaries;

a second bus interface connected to said subscriber equipment for receiving signals from and transmitting signals to an optical path interconnecting a first plurality of said subscriber equipment which are formatted as synchronous transport signals comprising virtual tributaries and overhead bytes;

a digital signal interface for receiving digital signals from and transmitting digital signals to wire paths coupled to said telecommunications system and a second plurality of said subscriber equipment; and

a mapper circuit connected to said first bus interface, said second bus interface and said digital signal interface, and configured to perform at least one mapping operation from a group of operations consisting of mapping at least one of said virtual tributaries to at least one of said digital signals, mapping at least one of said virtual tributaries to a different one of said virtual tributaries, and mapping at least one of said digital signals to at least one of said virtual tributaries.