Method and apparatus for regulating power to electronic circuits

• US 7,080,268 B2
• Filed: 12/03/2002
• Issued: 07/18/2006
• Est. Priority Date: 12/03/2002
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Mosley, Larry E.
• Primary Examiner(s): Cao, Chun
• Application Number:
  US10/308,487
• Publication Number:
  US 20040107370A1
• Time in Patent Office: 1,323 Days
• Field of Search: 713/300, 713/320, 713/322, 713/323
• US Class Current: 713/320
• CPC Class Codes: G05F 1/56 using semiconductor devices in series with the load as final control devices G05F1/461 takes precedence
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C

Abstract

A method and apparatus for supplying power to a load. The apparatus comprising a voltage regulator circuit and a controller coupled to the voltage regulator circuit. The controller to cause the voltage regulator circuit to maintain a first voltage for the load operating in the first mode. The controller to detect a change in the operating mode of the load and to cause the voltage regulator circuit to output a second voltage. Prior to causing the voltage regulator circuit to output a second voltage the controller may allow voltage and current to stabilize at the load at a value between the first mode and a second mode.

Claims

1. An apparatus comprising:

a voltage regulator circuit to regulate power at a load; and

a controller coupled to the voltage regulator circuit, said controller to cause the voltage regulator circuit to maintain a first voltage at the load when the load operates in a first mode, the controller to detect a transition in the load from the first mode to a second mode, the controller to cause the voltage regulator circuit to output a second voltage that is higher than a stabilized voltage, after the controller detects the transition in the load from the first mode to the second mode.

2. The apparatus of claim 1, wherein the controller is to allow voltage and current to stabilize at the load at voltage and current values between the first mode and the second mode prior to the controller causing the voltage regulator circuit to output the second voltage.

3. The apparatus of claim 1, wherein the controller is to allow the load to transition to the second mode after the voltage regulator circuit outputs the second voltage.

4. The apparatus of claim 1 further comprising a current sense circuit to couple the load to the voltage regulator circuit.

5. The apparatus of claim 2 wherein the first voltage, the stabilized voltage, and the second voltage are below a maximum permissible voltage for the load.

6. The apparatus of claim 2 wherein the second voltage is higher than the stabilized load voltage when the load transitions from the first mode to the second mode, said first mode being a low power consumption mode and said second mode being a high power consumption mode.

7. The apparatus of claim 2 wherein the second voltage is lower than the stabilized bad voltage when the load transitions from the first mode to the second mode said first mode being a high power-consumption mode and said second mode being a lower power consumption mode.

8. The apparatus of claim 1 wherein the load comprises a microprocessor.

9. The apparatus of claim 8 wherein the controller to cause the voltage regulator circuit to output a second voltage comprises the voltage regulator circuit to output a higher voltage than the stabilized load voltage when the microprocessor transitions from a low power consumption mode to a high power consumption mode.

10. The apparatus of claim 8 wherein the controller to cause the voltage regulator circuit to output a second voltage comprises the voltage regulator circuit to output a lower voltage than the stabilized load voltage when the microprocessor transitions from a high power consumption mode to a low power consumption mode.

11. A method for regulating power in a circuit comprising:

maintaining a first voltage at a load for the load operating in a first mode;

detecting a change in a first operating mode of the load when the load transitions from the first mode to a second mode; and

generating a second voltage that is higher than a stabilized voltage but lower than a maximum voltage for the load, after the change in the first operating mode of the load is detected.

12. The method of claim 11 wherein generating a second voltage when the change in the first operating mode of the load is detected comprises allowing voltage and current to stabilize at the load prior to generating the second voltage.

13. The method of claim 12 wherein generating a second voltage at the stabilized value of load current comprises generating a higher voltage than the stabilized voltage when the load transitions from a low power consumption mode to a high power consumption mode.

14. The method of claim 11 wherein generating a second voltage at the stabilized value of load current comprises generating a lower voltage than the stabilized voltage when the load transitions from a high power consumption mode to a low power consumption mode.

15. The method of claim 12 wherein the first voltage, the stabilized voltage, and the second voltage are less than a maximum permissible voltage for the circuit.

16. The method of claim 11 wherein detecting a change in the first operating mode of the load comprises any one of a controller detecting the change in the first operating mode of the load, and the load signaling the controller of the change in the first operating mode of the load.

17. The method of claim 12 wherein allowing voltage and current to stabilize at the load comprises at least one of allowing the voltage to stabilize at a value that is at least 3% of the voltage of the first mode, and allowing the current to stabilize at a value of at least 20% of a value of a maximum current of the load.

18. The method of claim 11 further comprising allowing the load to operate in a second mode after generating the second voltage.

19. An apparatus comprising:

a microprocessor, said microprocessor comprising a bus interface unit, a core coupled to the bus interface unit, and a clock coupled to the bus interface unit and the core; and

a voltage regulator circuit to regulate power to the microprocessor, a controller coupled to the voltage regulator circuit, said controller to cause the voltage regulator circuit to maintain a first voltage at the microprocessor, when the microprocessor operates in a first mode, and the controller to cause the voltage regulator circuit to output a second voltage that is higher than a stabilized voltage during a transition of the microprocessor between the first mode and a second mode.

20. The apparatus of claim 19 further comprising, the microprocessor to operate in the second mode after the voltage regulator circuit outputs the second voltage.

21. The apparatus of claim 19 wherein the controller to allow voltage and current to stabilize between the first mode and the second mode prior to the voltage regulator outputting the second voltage.

22. The apparatus of claim 21 wherein second voltage is higher than the stabilized voltage when the microprocessor transitions from a low power consumption mode to a high power consumption mode.

23. The apparatus of claim 21 wherein the second voltage is lower than the stabilized voltage when the microprocessor transitions from a high power consumption mode to a low power consumption mode.

24. The apparatus of claim 19 wherein the first voltage and the second voltage are below a maximum permissible voltage for the microprocessor.

25. The apparatus of claim 19 further comprising a current sense circuit to couple the microprocessor to the voltage regulator circuit.

26. The apparatus of claim 19 wherein the first voltage and the second voltage are output by the voltage regulator circuit when the microprocessor transitions between a stop clock mode and an instruction execution mode and vice versa.

27. The apparatus of claim 19 wherein the first mode comprises the voltage regulator supplying power to the clock.

28. A computer system comprising:

a load comprising a microprocessor and a memory coupled to the microprocessor;

a power supply to supply power to the load said power supply comprising a voltage regulator circuit to regulate power at the load; and

a controller coupled to the voltage regulator circuit, said controller to cause the voltage regulator circuit to maintain a first voltage for the microprocessor operating in a first mode, and the controller to cause the voltage regulator circuit to output a second voltage that is higher than a stabilized voltage but lower than a maximum voltage for the load during a transition of the microprocessor between the first mode and a second mode.

29. The computer system of claim 28 wherein the controller to cause the voltage regulator circuit to output a second voltage during the transition of the microprocessor between the first mode and a second mode comprises the controller to allow voltage and current to stabilize at the load prior to the controller causing the voltage regulator circuit to output the second voltage.

30. The computer system of claim 28 further comprising, the microprocessor to operate in the second mode after the voltage regulator circuit outputs the second voltage.

31. The computer system of claim 28 further comprising a current sense circuit to couple the load to the voltage regulator circuit.

32. The computer system of claim 29 wherein the first voltage, the stabilized voltage, and the second voltage are below a maximum permissible voltage for the load.

33. The computer system of claim 29 wherein the second voltage is higher than the stabilized load voltage when the load transitions from the first mode to the second mode, said first mode being a low power consumption mode of the microprocessor and said second mode being a high power consumption mode of the microprocessor.

34. The computer system of claim 29 wherein the second voltage is lower than the stabilized load voltage when the load transitions from the first mode to the second mode said first mode being the microprocessor'"'"'s high power consumption mode and said second mode being the microprocessor'"'"'s low power consumption mode.

35. The computer system of claim 29 wherein the controller to allow voltage and current to stabilize at the load comprises the controller to allow the microprocessor to execute one or more no-operation instructions.

36. An apparatus comprising:

a sense circuit coupled to a voltage regulator circuit and a load;

a controller coupled to the sense circuit and the voltage regulator circuit, said controller comprising a voltage comparison unit and a voltage reference unit, the voltage comparison unit to compare the voltage across the sense circuit with a reference voltage in the voltage reference unit to determine an operating mode of the load, the voltage comparison unit to cause the voltage regulator circuit to maintain a first voltage when the load operates in a first mode, the voltage comparison unit to detect a transition in the load from the first mode to a second mode, and to cause the voltage regulator circuit to output a second voltage that is higher than a stabilized voltage, after the controller detects the transition in the load from the first mode to the second mode.

37. The apparatus of claim 36 further comprising the controller to allow voltage and current to stabilize at the load at voltage and current values between the first mode and the second mode prior to the controller causing the voltage regulator circuit to output the second voltage.

38. The apparatus of claim 36 further comprising, allowing the load to transition to the second mode after the voltage regulator circuit outputs the second voltage.

39. The apparatus of claim 36 wherein the first voltage and the second voltage are below a maximum permissible voltage for the load.

40. The apparatus of claim 36 wherein the second voltage comprises one or more increasing voltages when the load transitions from the first mode to the second mode, said first mode being a low power consumption mode and said second mode being a high power consumption mode.

41. The apparatus of claim 36 wherein the second voltage comprises one or more decreasing voltages when the load transitions from the first mode to the second mode, said first mode being a high power consumption mode and said second mode being a low power consumption mode.