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Nitride semiconductor growth method, nitride semiconductor substrate, and nitride semiconductor device

  • US 7,083,679 B2
  • Filed: 11/08/2001
  • Issued: 08/01/2006
  • Est. Priority Date: 04/11/1997
  • Status: Expired due to Fees
First Claim
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1. A nitride semiconductor growth method comprising the steps of:

  • (a) forming a first selective growth mask on a support member made up of a dissimilar substrate made of a material different from a nitride semiconductor and having a major surface, and an underlayer made of a nitride semiconductor formed on the major surface of the dissimilar substrate having an off-angled major surface from the horizontal plane, wherein the off-angled major surface of the dissimilar substrate has an off-angle which is less than 1°

    , and wherein said off-angled major surface is formed stepwise such that the substrate has substantially horizontal terrace portions and stepped portions, said first selective growth mask having a plurality of first windows selectively exposing an upper surface of the underlayer of the support member;

    (b) growing first nitride semiconductor portions from the upper surface portions of the underlayer which are exposed from the windows, until the first nitride semiconductor portions grown in the adjacent windows combine with each other on an upper surface of said selective growth mask;

    (c) forming a second selective growth mask on the first nitride semiconductor portions grown in the step (b), said second selective growth mask having a plurality of second windows selectively exposing upper surfaces of the first nitride semiconductor portions;

    (d) growing second nitride semiconductor portions from the upper surfaces of the first nitride semiconductor portions which are exposed from the second windows, until the second nitride semiconductor portions grown in adjacent windows combine with each other on an upper surface of said second selective growth mask to form a nitride semiconductor substrate; and

    (e) growing nitride semiconductor layers including an active layer over the semiconductor substrate.

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