Method of fabricating semiconductor device comprising pixel having numerical aperture

• US 7,084,019 B2
• Filed: 04/29/2003
• Issued: 08/01/2006
• Est. Priority Date: 04/27/2000
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Arai, Yasuyuki, Yamazaki, Shunpei
• Primary Examiner(s): TRAN, MINH LOAN
• Application Number:
  US10/424,793
• Publication Number:
  US 20030197208A1
• Time in Patent Office: 1,190 Days
• Field of Search: 438/149, 438/151, 438/157, 438/283, 438/158, 438/159, 438/161, 438/164, 439/42, 439/43, 257/59, 257/72, 257/E21.561, 349/42, 349/43, 349/46
• US Class Current: 438/158
• CPC Class Codes: G02F 1/133302 Rigid substrates, e.g. inorganic substrates
• CPC Class Codes: G02F 1/133553 Reflecting elements associated to illuminating devices G02F1/133605
• CPC Class Codes: G02F 1/134336 Matrix
• CPC Class Codes: G02F 1/13439 characterised by their electrical, optical, physical properties; materials therefor; method of making
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/136295 Materials; Compositions; Manufacture processes
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2201/123 pixel
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02592 amorphous
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 21/02686 Pulsed laser beam
• CPC Class Codes: H01L 21/3003 Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1218 with a particular composition or structure of the substrate
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1251 comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
• CPC Class Codes: H01L 27/1255 : integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1285 : using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
• CPC Class Codes: H01L 29/66537 : using a self aligned punch through stopper or threshold implant under the gate region H01L29/66606 takes precedence
• CPC Class Codes: H01L 29/78621 : with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78633 : with a light shield
• CPC Class Codes: H01L 29/78678 : with inverted-type structure, e.g. with bottom gate
• CPC Class Codes: H01L 29/78684 : having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys H01L29/7869 takes precedence
• CPC Class Codes: H01L 29/78696 : characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H10K 59/12 : Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/121 : characterised by the geometry or disposition of pixel elements
• CPC Class Codes: H10K 59/1213 : the pixel elements being TFTs
• CPC Class Codes: H10K 59/1216 : the pixel elements being capacitors
• CPC Class Codes: H10K 59/122 : Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/123 : Connection of the pixel electrodes to the thin film transistors [TFT]
• CPC Class Codes: H10K 59/124 : Insulating layers formed between TFT elements and OLED elements
• CPC Class Codes: H10K 59/131 : Interconnections, e.g. wiring lines or terminals
• CPC Class Codes: H10K 59/1315 : comprising structures specially adapted for lowering the resistance

Abstract

An active matrix display device having a pixel structure in which pixel electrodes, gate wirings and source wirings are suitably arranged in the pixel portions to realize a high numerical aperture without increasing the number of masks or the number of steps. The device comprises a gate electrode and a source wiring on an insulating surface, a first insulating layer on the gate electrode and on the source wiring, a semiconductor layer on the first insulating film, a second insulating layer on the semiconductor film, a gate wiring connected to the gate electrode on the second insulating layer, a connection electrode for connecting the source wiring and the semiconductor layer together, and a pixel electrode connected to the semiconductor layer.

Claims

1. A method of fabricating a semiconductor device comprising:

forming a gate electrode of a TFT and a source wiring of the TFT over an insulating surface;

forming a first insulating film over the gate electrode and the source wiring;

forming a semiconductor film of the TFT over the first insulating film;

forming a second insulating film over the semiconductor film; and

forming, over the second insulating film, a gate wiring connected to the gate electrode, a connection electrode for connecting the source wiring and the semiconductor film together, and a pixel electrode connected to the semiconductor film.

2. A method according to claim 1, wherein the gate electrode is formed of an electrically conducting film which includes one or plural kinds of elements selected from molybdenum, tungsten and tantalum.

3. A method according to claim 1, wherein the formation of the first insulating film over the gate electrode includes a step of forming a first layer of silicon nitride and of forming a second layer of silicon oxide.

4. A method according to claim 1, wherein the second insulating film forming step includes a step of forming a first layer of an inorganic insulating material and a step of forming a second layer of an organic insulating material.

5. A method according to claim 1, further comprising the step of forming a liquid crystal layer over the pixel electrode.

6. A method according to claim 1, further comprising the step of forming an organic compound layer over the pixel electrode.

7. A method of fabricating a semiconductor device comprising:

forming a gate electrode of a TFT and a source wiring of the TFT over an insulating surface;

forming a first insulating film over the gate electrode and the source wiring;

forming a semiconductor film of the TFT over the first insulating film so as to be partly overlapped over the gate electrode;

forming a second insulating film over the semiconductor film; and

forming, over the second insulating film, a gate wiring connected to the gate electrode, a connection electrode for connecting the source wiring and the semiconductor film together, and a pixel electrode connected to the semiconductor film.

8. A method according to claim 7, wherein, after the formation of the semiconductor film over the first insulating film, a third insulating layer is formed over the semiconductor film in a region thereof overlapped over the gate electrode.

9. A method according to claim 7, wherein the gate electrode is formed of an electrically conducting film which includes one or plural kinds of elements selected from molybdenum, tungsten and tantalum.

10. A method according to claim 7, wherein the second step includes a step of forming a first layer of silicon nitride and of forming a second layer of silicon oxide.

11. A method according to claim 7, wherein the second insulating film forming step includes a step of forming a first layer of an inorganic insulating material and a step of forming a second layer of an organic insulating material.

12. A method according to claim 7, further comprising the step of forming a liquid crystal layer over the pixel electrode.

13. A method according to claim 7, further comprising the step of forming an organic compound layer over the pixel electrode.

14. A method of fabricating a semiconductor device comprising:

forming a gate electrode of a TFT and a source wiring of the TFT over an insulating surface;

forming a first insulating film over the gate electrode and the source wiring;

forming a semiconductor film over the first insulating film;

forming a source region and a drain region of the TFT in the semiconductor film;

forming a second insulating film over the semiconductor film; and

forming, over the second insulating film, a gate wiring connected to the gate electrode, a connection electrode for connecting the source wiring and the source region together, and a pixel electrode connected to the drain region.

15. A method according to claim 14, wherein the gate electrode is formed of an electrically conducting film which includes one or plural kinds of elements selected from molybdenum, tungsten and tantalum.

16. A method according to claim 14, wherein the formation of the first insulating film over the gate electrode includes a step of forming a first layer of silicon nitride and of forming a second layer of silicon oxide.

17. A method according to claim 14, wherein the second insulating film forming step includes a step of forming a first layer of an inorganic insulating material and a step of forming a second layer of an organic insulating material.

18. A method according to claim 14, further comprising the step of forming a liquid crystal layer over the pixel electrode.

19. A method according to claim 14, further comprising the step of forming an organic compound layer over the pixel electrode.

20. A method of fabricating a semiconductor device comprising:

forming a first gate electrode of a TFT, a second gate electrode of the TFT and a source wiring of the TFT over an insulating surface;

forming a first insulating film over the first and second gate electrodes and the source wiring;

forming, over the first insulating film, a first semiconductor film of the TFT that overlaps over the first gate electrode and a second semiconductor film that overlaps over the second gate electrode;

forming a source region and a drain region of the TFT in the first semiconductor film;

forming a second insulating film over at least one of the first semiconductor film and the second semiconductor film; and

forming, over the second insulating film, a gate wiring connected to the first gate electrode, a connection electrode for connecting the source wiring and the source region together, and a pixel electrode for connecting the drain region and the second semiconductor film together.

21. A method according to claim 20, wherein the gate electrode is formed of an electrically conducting film which includes one or plural kinds of elements selected from molybdenum, tungsten and tantalum.

22. A method according to claim 20, wherein the formation of the first insulating film over the first and second gate electrodes includes a step of forming a first layer of silicon nitride and of forming a second layer of silicon oxide.

23. A method according to claim 20, wherein the second insulating film forming step includes a step of forming a first layer of an inorganic insulating material and a step of forming a second layer of an organic insulating material.

24. A method according to claim 20, further comprising the step of forming a liquid crystal layer over the pixel electrode.

25. A method according to claim 20, further comprising the step of forming an organic compound layer over the pixel electrode.

26. A method of fabricating a semiconductor device comprising:

forming a gate electrode of a TFT and a source wiring of the TFT over an insulating surface simultaneously;

forming a first insulating film over the gate electrode and the source wiring;

forming a semiconductor film of the TFT over the first insulating film;

forming a second insulating film over the semiconductor film; and

forming, over the second insulating film, a gate wiring connected to the gate electrode, a connection electrode for connecting the source wiring and the semiconductor film together, and a pixel electrode connected to the semiconductor film.

27. A method according to claim 26, wherein the gate electrode is formed of an electrically conducting film which includes one or plural kinds of elements selected from molybdenum, tungsten and tantalum.

28. A method according to claim 26, wherein the formation of the first insulating film over the gate electrode includes a step of forming a first layer of silicon nitride and of forming a second layer of silicon oxide.

29. A method according to claim 26, wherein the second insulating film forming step includes a step of forming a first layer of an inorganic insulating material and a step of forming a second layer of an organic insulating material.

30. A method according to claim 26, further comprising the step of forming a liquid crystal layer over the pixel electrode.

31. A method according to claim 26, further comprising the step of forming an organic compound layer over the pixel electrode.

32. A method of fabricating a semiconductor device comprising:

forming a gate electrode of a TFT and a source wiring of the TFT over an insulating surface simultaneously;

forming a first insulating film over the gate electrode and the source wiring;

forming a semiconductor film of the TFT over the first insulating film;

forming a second insulating film over the semiconductor film; and

forming, over the second insulating film, a gate wiring connected to the gate electrode, a connection electrode for connecting the source wiring and the semiconductor film together, and a pixel electrode connected to the semiconductor film simultaneously.

33. A method according to claim 32, wherein the gate electrode is formed of an electrically conducting film which includes one or plural kinds of elements selected from molybdenum, tungsten and tantalum.

34. A method according to claim 32, wherein the formation of the first insulating film over the gate electrode includes a step of forming a first layer of silicon nitride and of forming a second layer of silicon oxide.

35. A method according to claim 32, wherein the second insulating film forming step includes a step of forming a first layer of an inorganic insulating material and a step of forming a second layer of an organic insulating material.

36. A method according to claim 32, further comprising the step of forming a liquid crystal layer over the pixel electrode.

37. A method according to claim 32, further comprising the step of forming an organic compound layer over the pixel electrode.