Embedded duo-planar printed inductor
First Claim
1. A compact inductor structure in two coplanar layers of a circuit board, the inductor structure comprising:
- a dielectric substrate having upper and lower faces;
a first set of parallel conductive traces formed on the upper face of the substrate in a first plane;
a second set of parallel conductive traces formed on the lower face of the substrate in a second plane;
a plurality of metallized vias extending through the substrate and interconnecting the first and second sets of conductive traces to form a continuous spiral path with inductive properties;
the first and second sets of parallel conductive traces are arranged in two adjacent ranks wherein the first set of traces in one rank is coplanar with the first set of traces in the other rank, and the second set of traces in one rank is coplanar with the second set of traces in the other rank so that the first and second sets of traces for both of the two ranks are contained in the same two parallel planes.
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Accused Products
Abstract
A highly compact inductor formed on opposite faces of a dielectric substrate. Sets of parallel spaced conductive traces formed on the opposite faces of the substrate are interconnected by metallized vias through the substrate, in such a way as to form a continuous spiral conductive path. The inductor is preferably formed as two closely adjacent segments, each with conductive traces on each face of the substrate and each having metallized vias interconnecting the conductive traces. The segments are electrically connected in series and produce a magnetic field that extends through each segment in opposite directions and is closely coupled from one segment to the other. The inductor is, therefore, electromagnetically similar to a wire-wound toroidal inductor, providing high inductance and contourable Q values, but is highly compact, especially in the z-axis direction normal to the substrate.
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Citations
11 Claims
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1. A compact inductor structure in two coplanar layers of a circuit board, the inductor structure comprising:
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a dielectric substrate having upper and lower faces; a first set of parallel conductive traces formed on the upper face of the substrate in a first plane; a second set of parallel conductive traces formed on the lower face of the substrate in a second plane; a plurality of metallized vias extending through the substrate and interconnecting the first and second sets of conductive traces to form a continuous spiral path with inductive properties; the first and second sets of parallel conductive traces are arranged in two adjacent ranks wherein the first set of traces in one rank is coplanar with the first set of traces in the other rank, and the second set of traces in one rank is coplanar with the second set of traces in the other rank so that the first and second sets of traces for both of the two ranks are contained in the same two parallel planes. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method for making a compact inductor embedded in a printed circuit board structure, the method comprising:
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providing a dielectric substrate having upper and lower faces; forming a first set of generally parallel conductive traces on the upper face of the substrate in a first plane; forming a second set of generally parallel conductive traces on the lower face of the substrate in a second lane; and forming a plurality of conductive vias through the substrate at positions corresponding to ends of the conductive traces; wherein the first and second sets of conductive traces and the plurality of conductive vias together form a continuous spiral conductive path with desirable inductance properties; forming two adjacent ranks of the first and second sets of parallel conductive traces wherein the first set of traces in one rank is formed coplanar with the first set of traces in the other rank, and the second set of traces in one rank is fromed coplanar with the second set of traces in the other rank so that the first and second sets of traces for both of the two ranks are contained in the same two parallel planes. - View Dependent Claims (8, 9, 10, 11)
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Specification