Instrumentation system having a reconfigurable instrumentation card with programmable logic and a modular daughter card

• US 7,089,466 B2
• Filed: 07/12/2002
• Issued: 08/08/2006
• Est. Priority Date: 07/12/2002
• Status: Active Grant

• Current Assignee: National Instruments Corporation (Emerson Electric Company)
• Original Assignee: National Instruments Corporation (Emerson Electric Company)
• Inventors: Willden, Jeremy, Odom, Brian Keith, Butler, Cary Paul
• Primary Examiner(s): Decady, Albert
• Assistant Examiner(s): Alphonse, Fritz
• Application Number:
  US10/194,720
• Publication Number:
  US 20040010739A1
• Time in Patent Office: 1,488 Days
• Field of Search: 714/724, 714/718, 714/725, 714/38, 714/47, 717/1, 717/2, 717/3, 717/12, 715/771
• US Class Current: 714/724
• CPC Class Codes: G01R 31/318364 as a result of hardware simulation, e.g. in an HDL environment computer-aided simulation of circuits G06F30/3308
• CPC Class Codes: G01R 31/31907 Modular tester, e.g. controlling and coordinating instruments in a bus based architecture

Abstract

An instrumentation system may include a base card that is configurable to perform multiple instrumentation tasks. The base card includes a programmable logic device (PLD) that is configured according to a hardware description. One of a plurality of possible daughter cards, e.g., a first daughter card or a second daughter card, may be coupled to the base card. One or more of: 1) providing a selected hardware description to the PLD; or 2) coupling of a selected daughter card to the base card may configure the reconfigurable instrumentation card to perform a desired instrumentation function. Thus, by selecting which of the daughter cards is coupled to the base card and/or by selecting which hardware description is used to configure the PLD, the base card may be reconfigured to perform different sets of instrumentation tasks.

Claims

1. An instrumentation system comprising:

a base card configurable to perform a plurality of instrumentation tasks, wherein the base card includes a programmable logic device;

a first daughter card, wherein if the first daughter card is coupled to the base card, the programmable logic device is configured according to a first hardware description and the base card is configured to perform at least a first one of the plurality of instrumentation tasks; and

a second daughter card, wherein if the second daughter card is coupled to the base card, the programmable logic device is configured according to a second hardware description and the base card is configured to perform at least a second one of the plurality of instrumentation tasks.

2. The instrumentation system of claim 1, wherein the at least a first one of the plurality of instrumentation tasks comprises waveform generation.

3. The instrumentation system of claim 2, wherein the first daughter card comprises a D/A (digital-to-analog) converter coupled to receive a series of digital waveform samples generated by the base card and configured to convert the series of digital waveform samples into an analog waveform.

4. The instrumentation system of claim 3, wherein the first daughter card comprises an upconverter configured to convert the analog waveform into an RF signal, and wherein the plurality of instrumentation tasks include performing upconversion in the digital domain on the digital waveform samples before providing the digital waveform samples to the daughter card.

5. The instrumentation system of claim 1, wherein the at least a second one of the plurality of instrumentation tasks comprises data acquisition.

6. The instrumentation system of claim 5, wherein the second daughter card comprises a A/D (analog-to-digital) converter coupled to receive an analog waveform and to provide a series of digital waveform samples to the base card, wherein the A/D converter is configured to convert the analog waveform into the series of digital waveform samples.

7. The instrumentation system of claim 6, wherein the second daughter card comprises a downconverter configured to receive an RF signal and to convert the RF signal into the analog waveform, wherein the plurality of instrumentation tasks include performing downconversion in the digital domain on the digital waveform samples received from the daughter card.

8. The instrumentation system of claim 1, wherein the base card includes a reconfigurable pin connector configured to be coupled to a respective pin connector included in one of the first and the second daughter cards, wherein the first hardware description includes a first pin definition for the reconfigurable pin connector and the second hardware description includes a second pin definition for the reconfigurable pin connector.

9. The instrumentation system of claim 1, wherein the base card is configured to be coupled to a PCI (Peripheral Component Interconnect) bus.

10. The instrumentation system of claim 9, wherein the first daughter card is configured to be coupled to the base card and to be coupled to a second base card configured to be coupled to a PXI (PCI Extensions for Instrumentation) bus.

11. The instrumentation system of claim 9, wherein the first daughter card is configured to be coupled to the base card and to be coupled to a second base card configured to be coupled to a PXI Express bus.

12. The instrumentation system of claim 9, wherein the first daughter card is configured to be coupled to the base card and to be coupled to a second base card configured to be coupled to an IEEE 1394 bus.

13. The instrumentation system of claim 9, wherein the first daughter card is configured to be coupled to the base card and to be coupled to a second base card configured to be coupled to a Compact PCI bus.

14. The instrumentation system of claim 1, further comprising a host computer system including a processor and a memory coupled to the processor, wherein the memory is configured to store a first program implementing the first portion of the instrumentation tasks, wherein the memory is further configured to store a second program executable by the processor to generate the first hardware description from at least a portion of the first program, and wherein the host computer system is configured to convey the first hardware description to the base card.

15. The instrumentation system of claim 14, wherein the first program is a graphical program.

16. The instrumentation system of claim 14, wherein the second program is further executable by the processor to generate a series of instructions from a second portion of the first program, wherein the host computer system is configured to convey the series of instructions to the base card, and wherein at least a portion of the series of instructions are executable by the programmable logic device when the programmable logic device is configured according to the first hardware description.

17. The instrumentation system of claim 16, wherein the base card includes a base card processor, wherein the base card processor is configured to execute at least a portion of the series of instructions.

18. The instrumentation system of claim 17, wherein the base card processor is configured to execute a first portion of the series of instructions that implements a data processing function and wherein the programmable logic device is configured to execute a second portion of the series of instructions that implements a data transfer function.

19. The instrumentation system of claim 16, wherein the base card includes a base card memory configured to store the series of instructions.

20. The instrumentation system of claim 19, wherein the base card includes a DMA (Direct Memory Access) device coupled to the base card memory and configured to control a transfer of the series of instructions from the memory to the base card memory.

21. The instrumentation system of claim 1, wherein the programmable logic device implements a processor when the programmable logic device is configured according to the first hardware description.

22. The instrumentation system of claim 1, wherein the base card includes a base card memory configured to buffer data being transferred between a host computer system and a daughter card coupled to the base card.

23. The instrumentation system of claim 1, wherein the first daughter card and the second daughter card each include at least one front panel connector and wherein the base card does not include a front panel connector.

24. An instrumentation system comprising:

a host computer system; and

an instrumentation card coupled to the host computer system, wherein the instrumentation card is configurable to perform a plurality of instrumentation tasks, wherein the instrumentation card comprises;

a base card comprising a programmable logic device; and

at least one daughter card coupled to the base card, wherein a type of the at least one daughter card determines which one of a plurality of hardware descriptions is used to configure the programmable logic device and which portion of the instrumentation tasks the instrumentation card is currently configured to perform.

25. The instrumentation system of claim 24, wherein the base card includes a reconfigurable pin connector configured to be coupled to a respective pin connector included in the at least one daughter card, wherein a first hardware description used to configure the programmable logic device also includes a pin definition for the reconfigurable pin connector, wherein the reconfigurable pin connector is configured according to the pin definition.

26. The instrumentation system of claim 24, wherein the base card is configured to be coupled to a PCI (Peripheral Component Interconnect) bus.

27. The instrumentation system of claim 26, wherein the at least one daughter card is configured to be coupled to the base card and to be coupled to a second base card configured to be coupled to a PXI (PCI Extensions for Instrumentation) bus.

28. The instrumentation system of claim 26, wherein the at least one daughter card is configured to be coupled to the base card and to be coupled to a second base card configured to be coupled to a PXI Express bus.

29. The instrumentation system of claim 26, wherein the at least one daughter card is configured to be coupled to the base card and to be coupled to a second base card configured to be coupled to an IEEE 1394 bus.

30. The instrumentation system of claim 26, wherein the at least one daughter card is configured to be coupled to the base card and to be coupled to a second base card configured to be coupled to a Compact PCI bus.

31. The instrumentation system of claim 24, wherein the host computer system comprises a processor and a memory coupled to the processor, wherein the memory is configured to store a first program implementing the portion of the instrumentation tasks that the instrumentation card is currently configured to perform, wherein the memory is further configured to store a second program executable by the processor to generate a first hardware description used to configured to programmable logic device from at least a portion of the first program, and wherein the host computer system is configured to convey the first hardware description to the base card.

32. The instrumentation system of claim 31, wherein the first program is a graphical program.

33. The instrumentation system of claim 31, wherein the second program is further executable by the processor to generate a series of instructions from a second portion of the first program, wherein the host computer system is configured to convey the series of instructions to the base card, and wherein at least a portion of the series of instructions are executable by the programmable logic device when the programmable logic device is configured according to the first hardware description.

34. The instrumentation system of claim 33, wherein the base card includes a base card processor, wherein the base card processor is configured to execute at least a portion of the series of instructions.

35. The instrumentation system of claim 34, wherein the base card processor is configured to execute a first portion of the series of instructions that implements a data processing function and wherein the programmable logic device is configured to execute a second portion of the series of instructions that implements a data transfer function.

36. The instrumentation system of claim 33, wherein the base card includes a base card memory configured to store the series of instructions.

37. The instrumentation system of claim 36, wherein the base card includes a DMA (Direct Memory Access) device coupled to the base card memory and configured to control a transfer of the series of instructions from the memory to the base card memory.

38. The instrumentation system of claim 24, wherein the programmable logic device implements a processor when the programmable logic device is configured according to the first hardware description.

39. The instrumentation system of claim 24, wherein the base card includes a base card memory configured to buffer data being transferred between a host computer system and the at least one daughter card coupled to the base card.

40. The instrumentation system of claim 24, wherein the at least one daughter card includes at least one front panel connector and wherein the base card does not include a front panel connector.

41. A method of reconfiguring an instrumentation system, the method comprising:

configuring an instrumentation card to perform a first set of tasks, wherein the instrumentation card comprises a base card and at least one daughter card, wherein the base card comprises a programmable logic device, wherein said configuring comprises coupling a first type of daughter card to the base card and configuring the programmable logic device according to a first hardware description;

configuring the instrumentation card to perform a second set of tasks by coupling a second type of daughter card to the base card and configuring the programmable logic device according to a second hardware description.

42. The method of claim 41, wherein the first set of tasks comprises waveform generation.

43. The method of claim 42, wherein the first type of daughter card comprises a D/A (digital-to-analog) converter coupled to receive a series of digital waveform samples generated by the base card and configured to convert the series of digital waveform samples into an analog waveform.

44. The method of claim 41, wherein the second set of tasks comprises data acquisition.

45. The method of claim 44, wherein the second type of daughter card comprises a AID (analog-to-digital) converter coupled to receive an analog waveform from a unit under test and to provide a series of digital waveform samples to the base card, wherein the A/D converter is configured to convert the analog waveform into the series of digital waveform samples.

46. The method of claim 41, wherein said configuring the instrumentation card to perform the first set of tasks includes configuring a reconfigurable pin connector included in the base card according to a first pin definition, wherein the reconfigurable pin connector is configured to be coupled to a respective pin connector included in the at least one daughter card, wherein the first hardware description includes the first pin definition.

47. The method of claim 41, wherein the base card is configured to be coupled to a PCI (Peripheral Component Interconnect) bus.

48. The method of claim 47, wherein the at least one daughter card is configured to be coupled to the base card and to be coupled to a second base card configured to be coupled to at least one of:

a PXI (PCI Extensions for Instrumentation) bus, a PXI Express bus, an IEEE 1394 bus, and a Compact PCI bus.

49. The method of claim 41, further comprising creating a first program implementing the first portion of the instrumentation tasks and generating the first hardware description from at least a portion of the first program.

50. The method of claim 49, wherein the first program is a graphical program.

51. The method of claim 49, further comprising generating a series of instructions from a second portion of the first program and the programmable logic device executing at least a portion of the series of instructions.

52. The method of claim 51, further comprising a processor included in the base card executing at least a portion of the series of instructions.

53. The method of claim 51, further comprising storing the series of instructions in a memory included in the base card.

54. The method of claim 53, further comprising a DMA (Direct Memory Access) device included in the base card controlling a transfer of the series of instructions from a host computer system memory to the base card memory.

55. The method of claim 41, wherein said configuring the programmable logic device according to a first hardware description comprises configuring the programmable logic device to implement a processor.

56. The method of claim 41, further comprising a memory included in the base card buffering data being transferred between a host computer system and the at least one daughter card coupled to the base card.

57. An instrumentation system comprising:

a base card configurable to perform a plurality of instrumentation tasks, wherein the base card includes;

a programmable logic device, wherein the programmable logic device is programmable with a first hardware description of a plurality of possible hardware descriptions; and

a slot for receiving a first daughter card selected from a plurality of possible daughter cards;

the first daughter card selected from the plurality of possible daughter cards, wherein the first daughter card is operable to be coupled to the slot of the base card;

wherein the base card is configurable to perform a first instrumentation task of the plurality of instrumentation tasks based on selection of the first hardware description and selection of the first daughter card.

58. The instrumentation system of claim 57, further comprising:

a second daughter card selected from the plurality of possible daughter cards, wherein the second daughter card is operable to be coupled to the slot of the base card;

wherein when the second daughter card is coupled to the base card, and the programmable logic device is configured according to a second hardware description, the instrumentation system is configured to perform a second instrumentation task of the plurality of instrumentation tasks.

59. The instrumentation system of claim 57, further comprising a host computer system memory which stores the plurality of possible hardware descriptions.

60. The instrumentation system of claim 57, wherein the first instrumentation task of the plurality of instrumentation tasks comprises waveform generation.

61. The instrumentation system of claim 60, wherein the first daughter card comprises a D/A (digital-to-analog) converter coupled to receive a series of digital waveform samples generated by the base card and configured to convert the series of digital waveform samples into an analog waveform.

62. The instrumentation system of claim 57, wherein the second instrumentation task of the plurality of instrumentation tasks comprises data acquisition.

63. The instrumentation system of claim 62, wherein the second daughter card comprises a A/D (analog-to-digital) converter coupled to receive an analog waveform from a unit under test and to provide a series of digital waveform samples to the base card, wherein the AID converter is configured to convert the analog waveform into the series of digital waveform samples.

64. The instrumentation system of claim 57, wherein the base card includes a reconfigurable pin connector configured to be coupled to a respective pin connector included in one of the plurality of possible daughter cards, wherein each of the plurality of possible hardware descriptions includes a pin definition for the reconfigurable pin connector corresponding to one of the plurality of possible daughter cards.

65. The instrumentation system of claim 57, further comprising host computer system, wherein the host computer system includes a processor and a memory coupled to the processor, wherein the memory is configured to store a first program implementing the first instrumentation task, wherein the memory is further configured to store a second program executable by the processor to generate the first hardware description from at least a portion of the first program, and wherein the host computer system is configured to convey the first hardware description to the base card.

66. The instrumentation system of claim 65, wherein the first program is a graphical program.

67. The instrumentation system of claim 65, wherein the second program is further executable by the processor to generate a series of instructions from a second portion of the first program, wherein the host computer system is configured to convey the series of instructions to the base card, and wherein at least a portion of the series of instructions are executable by the programmable logic device when the programmable logic device is configured according to the first hardware description.

68. The instrumentation system of claim 67, wherein the base card includes a base card processor, and wherein the base card processor is configured to execute at least a portion of the series of instructions.

69. The instrumentation system of claim 57, wherein the base card is configured to be coupled to one of:

a PCI (Peripheral Component Interconnect) bus, a PXI (PCI Extensions for Instrumentation) bus, a PXI Express bus, an IEEE 1394 bus, and a Compact PCI bus, and wherein the at least one daughter card is configured to be coupled to at least one other base card that is configured to be coupled to a different type of bus than the base card.

70. A system for configuring an instrumentation system to perform one of a plurality of possible instrumentation tasks, the system comprising:

a computer system, comprising;

a processor;

a memory medium coupled to the processor which stores a plurality of hardware descriptions; and

a slot coupled to the processor and memory medium adapted to receiving a base card;

a base card configurable to perform a plurality of instrumentation tasks, wherein the base card is adapted to be coupled to the slot of the computer system, wherein the base card includes;

a programmable logic device, wherein the programmable logic device is programmable with one of the plurality of hardware descriptions; and

a slot for receiving a daughter card selected from a plurality of daughter cards;

the plurality of possible daughter cards, wherein each of the daughter cards is operable to be coupled to the slot of the base card;

wherein the base card is configurable with one of the plurality of daughter cards and one of the plurality of hardware descriptions to perform one of a plurality of possible instrumentation tasks.

71. The instrumentation system of claim 70, wherein the one of the plurality of possible instrumentation tasks includes waveform generation.

72. The instrumentation system of claim 71, wherein the daughter card selected from the plurality of daughter cards comprises a D/A (digital-to-analog) converter coupled to receive a series of digital waveform samples generated by the base card and configured to convert the series of digital waveform samples into an analog waveform.

73. The instrumentation system of claim 70, wherein the one of the plurality of possible instrumentation tasks includes data acquisition.

74. The instrumentation system of claim 73, wherein the daughter card selected from the plurality of daughter cards comprises a AID (analog-to-digital) converter coupled to receive an analog waveform from a unit under test and to provide a series of digital waveform samples to the base card, wherein the A/D converter is configured to convert the analog waveform into the series of digital waveform samples.

75. The instrumentation system of claim 70, wherein the base card includes a reconfigurable pin connector configured to be coupled to a respective pin connector included in one of the plurality of possible daughter cards, wherein each of the plurality of hardware descriptions includes a pin definition for the reconfigurable pin connector corresponding to one of the plurality of possible daughter cards.

76. The instrumentation system of claim 70, wherein the memory medium is configured to store a first program implementing the first instrumentation task, wherein the memory medium is further configured to store a second program executable by the processor to generate the first hardware description from at least a portion of the first program, and wherein the computer system is configured to convey the first hardware description to the base card.

77. The instrumentation system of claim 76, wherein the first program is a graphical program.

78. The instrumentation system of claim 77, wherein the second program is further executable by the processor to generate a series of instructions from a second portion of the first program, wherein the computer system is configured to convey the series of instructions to the base card, and wherein at least a portion of the series of instructions are executable by the programmable logic device when the programmable logic device is configured according to the one of the plurality of hardware descriptions.

79. The instrumentation system of claim 78, wherein the base card includes a base card processor, and wherein the base card processor is configured to execute at least a portion of the series of instructions.

80. The method of claim 70, wherein the base card is configured to be coupled to one of:

a PCI (Peripheral Component Interconnect) bus, a PXI (PCI Extensions for Instrumentation) bus, a PXI Express bus, an IEEE 1394 bus, and a Compact PCI bus, and wherein the at least one daughter card is configured to be coupled to at least one other base card that is configured to be coupled to a different type of bus than the base card. card comprises a A/D (analog-to-digital) converter coupled to receive an analog waveform and to provide a series of digital waveform samples to the base card, wherein the A/D converter is configured to convert the analog waveform into the series of digital.