Apparatus and methods for generating radio frequencies in communication circuitry using multiple control signals

• US 7,092,675 B2
• Filed: 02/13/2002
• Issued: 08/15/2006
• Est. Priority Date: 05/29/1998
• Status: Expired due to Fees

• Current Assignee: Silicon Laboratories Incorporated
• Original Assignee: Silicon Laboratories Incorporated
• Inventors: Scott, Jeffrey W., Lim, Lysander, Tuttle, G. Tyson, Behrens, Richard T., Vishakhadatta, G. Diwakar, Wang, Caiyi, Welland, David R., Kerth, Donald A., Srinivasan, Vishnu S.
• Primary Examiner(s): Gesesse, Tilahun
• Application Number:
  US10/075,098
• Publication Number:
  US 20020187763A1
• Time in Patent Office: 1,644 Days
• Field of Search: 455/74, 455/114.2, 455/77, 455/86, 455/78, 455/83, 455/260, 455/76, 455/183.1, 455/75, 455/261, 455/262, 331/117, 331/179, 331/177.R, 331/177.V, 331/36.V
• US Class Current: 455/76
• CPC Class Codes: H03L 7/085 concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal H03L7/10 takes precedence; circuits for comparing the phase or frequency of two mutually-independent oscillations H03D13/00
• CPC Class Codes: H03L 7/087 using at least two phase detectors or a frequency and phase detector in the loop
• CPC Class Codes: H03L 7/091 the phase or frequency detector using a sampling device H03L7/087 takes precedence
• CPC Class Codes: H03L 7/099 concerning mainly the controlled oscillator of the loop
• CPC Class Codes: H03L 7/187 using means for coarse tuning the voltage controlled oscillator of the loop H03L7/191 - H03L7/195 take precedence
• CPC Class Codes: H03L 7/199 with reset of the frequency divider or the counter, e.g. for assuring initial synchronisation
• CPC Class Codes: H03L 7/23 with pulse counters or frequency dividers
• CPC Class Codes: H04B 1/0003 Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain digital baseband systems H04L25/00; digital modulation/demodulation H04L27/00; CDMA H04B1/707; TDMA H04B7/2643; image transmission H04N5/00
• CPC Class Codes: H04B 1/28 the receiver comprising at least one semiconductor device having three or more electrodes
• CPC Class Codes: H04B 1/406 with more than one transmission mode, e.g. analog and digital modes
• CPC Class Codes: H04B 15/02 Reducing interference from electric apparatus by means located at or near the interfering apparatus
• CPC Class Codes: H04B 15/04 the interference being caused by substantially sinusoidal oscillations, e.g. in a receiver or in a tape-recorder
• CPC Class Codes: H04B 2215/064 Reduction of clock or synthesizer reference frequency harmonics

Abstract

A radio-frequency (RF) apparatus capable of transmitting RF signals includes transmitter path circuitry. The transmitter path circuitry includes a voltage-controlled oscillator (VCO) that generates an output signal. The frequency of the output signal of the VCO circuitry is adjustable in response to a first control signal and a second control signal. The transmitter path circuitry also includes a first feedback circuitry and a second feedback circuitry that are responsive to the output signal of the VCO circuitry. The first feedback circuitry provides the first control signal to the VCO circuitry. The first control signal coarsely adjusts the frequency of the output signal of the VCO circuitry to a desired frequency. The second feedback circuitry supplies the second control signal to the VCO circuitry. The second control signal fine tunes the frequency of the output signal of the voltage-controlled oscillator circuitry to the desired frequency.

Claims

1. A radio-frequency (RF) apparatus capable of transmitting radio-frequency signals, the radio-frequency apparatus comprising:

transmitter path circuitry, including;

a voltage-controlled oscillator circuitry, the voltage-controlled oscillator circuitry configured to generate an output signal having an adjustable frequency in response to first and second control signals;

a first feedback circuitry, the first feedback circuitry being responsive to the output signal of the voltage-controlled oscillator circuitry, the first feedback circuitry configured to provide the first control signal to the voltage-controlled oscillator circuitry; and

a second feedback circuitry, the second feedback circuitry being responsive to the output signal of the voltage-controlled oscillator circuitry, the second feedback circuitry configured to provide the second control signal to the voltage-controlled oscillator circuitry,

wherein the first control signal coarsely adjusts the frequency of the output signal of the voltage-controlled oscillator circuitry to a desired frequency, and

wherein the second signal fine tunes the frequency of the output signal of the voltage-controlled oscillator circuitry to the desired frequency.

2. The radio-frequency (RE) apparatus according to claim 1, wherein the frequency of the output signal of the voltage-controlled oscillator is adjusted during a first adjustment phase, and wherein the frequency of the output signal of the voltage-controlled oscillator is fine tuned during a second adjustment phase.

3. The radio-frequency (RE) apparatus according to claim 2, wherein the first adjustment phase occurs before the second adjustment phase.

4. The radio-frequency (RE) apparatus according to claim 3, wherein the first feedback circuitry adjusts the frequency of the output signal of the voltage-controlled oscillator during the first adjustment phase, and wherein the second feedback circuitry adjusts the frequency of the output signal of the voltage-controlled oscillator during the second adjustment phase.

5. The radio-frequency (RE) apparatus according to claim 4, wherein the first control signal comprises a plurality of digital signals.

6. The radio-frequency (RE) apparatus according to claim 5, wherein the second control signal comprises an analog signal.

7. The radio-frequency (RE) apparatus according to claim 6, wherein the second adjustment phase commences in response to a signal provided to the second feedback circuitry by the first feedback circuitry.

8. The radio-frequency (RF) apparatus according to claim 7, wherein the first adjustment phase and the second adjustment phase occur before a transmit burst by the transmitter path circuitry.

9. The radio-frequency (RE) apparatus according to claim 8, wherein the first feedback circuitry is further responsive to a reference signal.

10. The radio-frequency (RE) apparatus according to claim 9, wherein the second feedback circuitry is further responsive to an intermediate-frequency signal.

11. The radio-frequency (RE) apparatus according to claim 10, wherein the second feedback circuitry is further responsive to a radio-frequency local oscillator signal.

12. An integrated circuit, comprising:

a voltage-controlled oscillator circuit coupled to a radio-frequency transmitter circuit within the integrated circuit, the voltage-controlled oscillator circuit including;

a continuously variable capacitor having a plurality of capacitor stages,

the continuously variable capacitor having a capacitance that varies in response to an analog control signal; and

a discretely variable capacitor coupled in parallel with the continuously variable capacitor, the discretely variable capacitor having a capacitance that varies in response to a plurality of control signals; and

a feedback circuit coupled to the voltage-controlled oscillator circuit, the feedback circuit configured to supply the analog control signal and the plurality of control signals in response to an output signal of the voltage-controlled oscillator circuit,

wherein the radio-frequency transmitter circuit has an output signal derived from the output signal of the voltage-controlled oscillator circuit.

13. The integrated circuit according to claim 12, wherein the continuously variable capacitor comprises a plurality of variable capacitors coupled in parallel.

14. The integrated circuit according to claim 13, wherein a capacitance of each variable capacitor in the continuously variable capacitor varies in response to a plurality of signals derived from the analog control signal.

15. The integrated circuit according to claim 14, wherein the discretely variable capacitor comprises a plurality of capacitor-switch combinations coupled in parallel, wherein each of the plurality of capacitor-switch combinations comprises a capacitor coupled in parallel with a switch.

16. The integrated circuit according to claim 15, wherein each of the plurality of control signals controls a corresponding one of the switches in the plurality of capacitor-switch combinations.

17. The integrated circuit according to claim 16, wherein the feedback circuit comprises a first feedback circuit and a second feedback circuit.

18. The integrated circuit according to claim 17, wherein the first feedback circuit comprises a frequency calibration engine configured to supply the plurality of control signals.

19. The integrated circuit according to claim 18, wherein the frequency calibration engine supplies the plurality of control signals in response to a reference signal and the output signal of the voltage-controlled oscillator circuit.

20. The integrated circuit according to claim 19, wherein the second feedback circuit comprises a mixer, the mixer configured to provide a mixed signal derived from the output signal of the voltage-controlled oscillator circuit and a radio-frequency local oscillator signal.

21. The integrated circuit according to claim 20, wherein the second feedback circuit further comprises a phase detector circuit, the phase detector circuit configured to provide an error signal derived from the mixed signal and an intermediate-frequency signal.

22. The integrated circuit according to claim 21, wherein the second feedback circuit further comprises a filter circuit, the filter circuit configured to supply the analog control signal in response to the error signal.

23. The integrated circuit according to claim 22, further comprising receiver circuitry configured to receive a radio-frequency input signal.

24. The integrated circuit according to claim 23, wherein the receiver circuitry couples to signal processing circuitry within a second integrated circuit.

25. The integrated circuit according to claim 24, wherein the receiver circuitry comprises low intermediate-frequency receiver circuitry.

26. A method of generating radio-frequency (RF) signals in an apparatus capable of transmitting radio-frequency signals, comprising:

generating with a controlled oscillator circuitry an output signal having a frequency that is adjustable in response to first and second control signals;

generating the first control signal in response to the output signal of the controlled oscillator circuitry;

adjusting coarsely the frequency of the output signal of the controlled oscillator circuitry to a desired frequency in response to the first control signal;

generating the second control signal in response to the output signal of the controlled oscillator circuitry; and

fine tuning the frequency of the output signal of the controlled oscillator circuitry to the desired frequency in response to the second control signal.

27. The method according to claim 26, further comprising:

adjusting the frequency of the output signal of the controlled oscillator during a first adjustment phase; and

fine tuning the frequency of the output signal of the controlled oscillator circuitry during a second adjustment phase.

28. The method according to claim 27, further comprising performing the first adjustment phase before the second adjustment phase.

29. The method according to claim 28, further comprising:

using the first control signal to adjust coarsely the frequency of the output signal of the controlled oscillator circuitry during the first adjustment phase; and

using the second control signal to fine tune the frequency of the output signal of the controlled oscillator during the second adjustment phase.

30. The method according to claim 29, wherein the first control signal comprises a plurality of digital signals.

31. The method according to claim 30, wherein the second control signal comprises an analog signal.

32. The method according to claim 31, further comprising:

performing the first adjustment phase;

performing the second adjustment phase; and

starting a transmit burst.

33. The method according to claim 32, wherein generating the first control signal further comprises using a reference signal to derive the first control signal.

34. The method according to claim 33, wherein generating the second control signal further comprises using a radio-frequency local oscillator signal to derive the second control signal.

35. The method according to claim 34, wherein generating the second control signal further comprises using an intermediate-frequency signal to derive the second control.