Compressing microcode
First Claim
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1. A method comprising:
- segmenting each word of a code portion into a plurality of fields, wherein the code portion comprises microcode to be stored in a read only memory;
forming tables for each of the plurality of fields, each table having a plurality of unique entries; and
assigning one of a plurality of pointers to each of the plurality of unique entries in each of the tables.
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Abstract
In one embodiment, the present invention includes a method to compress data stored in a memory to reduce size and power consumption. The method includes segmenting each word of a code portion into multiple fields, forming tables having unique entries for each of the fields, and assigning a pointer to each of the unique entries in each of the tables. Other embodiments are described and claimed.
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Citations
29 Claims
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1. A method comprising:
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segmenting each word of a code portion into a plurality of fields, wherein the code portion comprises microcode to be stored in a read only memory; forming tables for each of the plurality of fields, each table having a plurality of unique entries; and assigning one of a plurality of pointers to each of the plurality of unique entries in each of the tables. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. An apparatus comprising:
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a memory including a plurality of tables, each of the plurality of tables including unique entries for a field within microcode words; and the memory including an array to store at least one sequence of pointers to access the plurality of tables. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. An article comprising a machine-readable storage medium that stores data representing an integrated circuit comprising:
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a memory having a plurality of tables each including unique entries for a field of a microcode; and the memory having an array to store a compressed representation of each field for words of the microcode. - View Dependent Claims (16, 17)
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18. An article comprising a machine-readable storage medium that stores data representing an integrated circuit comprising:
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a memory having a plurality of tables each including unique entries for a field of a microcode and a logic operator coupled to one or more of the plurality of tables to perform an operation on an output of the one or more of the plurality of tables according to an indicator; and the memory having an array to store a compressed representation of each field for words of the microcode. - View Dependent Claims (19)
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20. A system comprising:
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a first memory array to store pointer sequences; a second memory array having a plurality of tables, each of the plurality of tables including unique entries for microcode words; and a dynamic random access memory (DRAM) coupled to the first memory array and the second memory array. - View Dependent Claims (21, 22, 23, 24, 25, 26)
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27. A method comprising:
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segmenting each word of a code portion into a plurality of fields; forming tables for each of the plurality of fields, each table having a plurality of unique entries, wherein locations in the tables are assigned in a generally decreasing order of occurrence in codewords of the code portion; and assigning one of a plurality of pointers to each of the plurality of unique entries in each of the tables. - View Dependent Claims (28, 29)
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Specification