Method and apparatus for performing scalar quantization with a power of two step size
First Claim
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1. A computer implemented method comprising:
- receiving a sequence of image data to compress;
specifying scalar quantization with a power of two step size using only three bit values to represent a quantizer that is applied to the sequence of image data, three bit values specifying a number of magnitude wavelet transform coefficient bitplanes to be truncated during the quantization, each of the magnitude wavelet transform coefficient bitplanes representing a magnitude level associated with wavelet trandform coefficients, the three bits indicating that all bitplanes are to be truncated when the three bits are in predetermined logic states.
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Abstract
A method and apparatus for performing scalar quantization with a power of two step size is described. In one embodiment, the method comprises receiving a sequence of image data to compress and specifying scalar quantization with a power of two step size using three bit values to apply to the sequence of image data.
170 Citations
24 Claims
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1. A computer implemented method comprising:
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receiving a sequence of image data to compress; specifying scalar quantization with a power of two step size using only three bit values to represent a quantizer that is applied to the sequence of image data, three bit values specifying a number of magnitude wavelet transform coefficient bitplanes to be truncated during the quantization, each of the magnitude wavelet transform coefficient bitplanes representing a magnitude level associated with wavelet trandform coefficients, the three bits indicating that all bitplanes are to be truncated when the three bits are in predetermined logic states. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 21)
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9. An apparatus comprising:
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means for receiving a sequence of image data to compress; means for specifying scalar quantization with a power of two step size using only three bit values to represent a quantizer that is applied to the sequence of image data, the three bit values specifying a number of magnitude wavelet transform coefficient bitplanes to be truncated during the quantization, each of the magnitude wavelet transform coefficients bitplanes representing a magnitude level associated with wavelet tranform coefficients, the three bits indicating that all bitplanes are to be truncated when the three bits are in predetermined logic states. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 18, 22)
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17. An apparatus for compressing image data comprising:
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a controller to specify scalar quantization with a power of two step size using three bit values to be applied to the image data; a compressor coupled to the controller to compress a sequence of image data to create compressed data, the compressor comprising a quantizer responsive to the scalar quantization specified by the controller to quantize the image data, the quantizer represented by only three bit valus, the three bit values specifying a number of magnitude wavelet transform coefficient bitplanes to be truncated during the quantization, each of the magnitude wavelet transform coefficient bitplanes representing a magnitude level associated with wavelet transform coefficients, the three bits indicating that all bitplanes are to be truncated when the three bits are in predetermined logic states. - View Dependent Claims (19, 23)
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20. An article of manufacture comprising one or more computer recordable media having executable instructions stored thereon which, when executed by a computer, cause the computer to:
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receive a sequence of image data to compress; specify scalar quantization with a power of two step size using only three bit values to represent a quantizer that is applied to the sequence of image data, the three bit values specifying a number of magnitude wavelet transform coefficient bitplanes to be truncated during the quantization, each of the magnitude wavelet transform coefficient bitplanes representing a magnitude level associated with wavelet transform coefficients, the three bits indicating that all bitplanes are to be truncated when the three bits are in predetermined logic states. - View Dependent Claims (24)
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Specification