Random number generator and generation method

• US 7,096,242 B2
• Filed: 06/17/2002
• Issued: 08/22/2006
• Est. Priority Date: 02/14/1995
• Status: Expired due to Term

• Current Assignee: The Quantum World Corporation (Altitude Capital Partners)
• Original Assignee: The Quantum World Corporation (Altitude Capital Partners)
• Inventors: Wilber, Scott A.
• Primary Examiner(s): Mai, Tan V.
• Application Number:
  US10/173,520
• Publication Number:
  US 20020169810A1
• Time in Patent Office: 1,527 Days
• Field of Search: 708/255
• US Class Current: 708/255
• CPC Class Codes: G06F 7/58 Random or pseudo-random number generators
• CPC Class Codes: G06F 7/588 Random number generators, i.e. based on natural stochastic processes

Abstract

An RNG circuit is connected to the parallel port of a computer. The circuit includes a flat source of white noise and a CMOS amplifier circuit compensated in the high frequency range. A low-frequency cut-off is selected to maintain high band-width yet eliminate the 1/f amplifier noise tail. A CMOS comparator with a 10 nanosecond rise time converts the analog signal to a binary one. A shift register converts the serial signal to a 4-bit parallel one at a sample rate selected at the knee of the serial dependence curve. Two levels of XOR defect correction produce a BRS at 20 kHZ, which is converted to a 4-bit parallel word, latched and buffered. The entire circuit is powered from the data pins of the parallel port. A device driver interface in the computer operates the RNG. The randomness defects with various levels of correction and sample rates are calculated and the RNG is optimized before manufacture.

Claims

1. A method of producing and utilizing a true random number, said method comprising:

providing an analog random signal;

providing a clock signal;

using said analog random signal and said clock signal to produce a binary true random sequence of signals;

interfacing said binary true random sequence of signals to a general-purpose computer; and

utilizing said binary true random sequence of signals in said general-purpose computer.

2. A method as in claim 1 wherein said step of providing an analog random signal comprises a step of providing a source of noise selected from the group consisting of thermal noise, amplifier noise, and quantum noise.

3. A method as in claim 1 and further including the step of reducing randomness defects in said true random sequence of binary signals.

4. A method as in claim 1 and further including the step of amplifying said analog random signal prior to set step of using.

5. A method as in claim 1 wherein said interfacing said binary true random sequence of signals to a general-purpose computer comprises:

utilizing an interface selected from the group consisting of a device driver, a portion of the operating system of said general-purpose computer, a portion of a Windows®

operating system, a program stored in the bios memory of said general-purpose computer, a program in firmware, and a TSR program.

6. A method as in claim 1 wherein said general-purpose computer comprises a personal computer.

7. A method as in claim 1 and further including:

providing power from said general-purpose computer to a random number generator circuit.

8. A true random number generator system comprising:

a source of analog random signals;

a source of a clock signal;

a sampler for producing a binary true random sequence of signals from said analog random signals and said clock signal;

a general-purpose computer for utilizing said binary true random sequence of signals; and

an interface for applying said binary true random sequence of signals to said general-purpose computer.

9. A true random number generator system as in claim 8 wherein said source of analog random signals comprises a source of noise selected from the group consisting of thermal noise, amplifier noise, and quantum noise.

10. A true random number generator system as in claim 8 and further including a randomness corrector for reducing randomness defects in said binary true random sequence of signals.

11. A true random number generator system as in claim 10 wherein said randomness corrector comprises a system for performing an EXCLUSIVE OR function.

12. A true random number generator system as in claim 8 wherein said interface comprises an interface selected from the group consisting of a device driver, a portion of the operating system of said general-purpose computer, a portion of a Windows®

operating system, a program stored in the bios memory of said general-purpose computer, a program in firmware, and a TSR program.

13. A true random number generator system as in claim 8 wherein said general-purpose computer comprises a personal computer.

14. A true random number generator system as in claim 8:

wherein a random number generator circuit includes said source of analog random signals, said source of a clock signal, and said sampler; and

said true random number generator system further comprises;

a power connection operable to provide power from said general-purpose computer to said random number generator circuit.

15. A true random number generator system as in claim 8 wherein:

a random number generator circuit includes said source of analog random signals, said source of a clock signal, and said sampler; and

said random number generator circuit is located in said system at a location selected from the group consisting of the mother board of said general-purpose computer, an add-on board installed in said general-purpose computer, a separate module, and a peripheral of said general-purpose computer.

16. A true random number generator system comprising:

a hardware device for producing a binary true random sequence of signals;

a randomness corrector for reducing randomness defects in said binary true random sequence of signals;

a general-purpose computer for utilizing said binary true random sequence of signals; and

an interface for applying said binary true random sequence of signals to said general-purpose computer.

17. A true random number generator system as in claim 16 wherein said randomness corrector comprises a system for performing an EXCLUSIVE OR function.

18. A true random number generator system as in claim 16 wherein said interface comprises an interface selected from the group consisting of a device driver, a portion of the operating system of said general-purpose computer, a portion of a Windows®

operating system, a program stored in the bios memory of said general-purpose computer, a program in firmware, and a TSR program.

19. A true random number generator system as in claim 16 wherein said general-purpose computer comprises a personal computer.

20. A true random number generator system as in claim 16:

wherein a random number generator circuit includes said source of analog random signals, said source of a clock signal, and said sampler; and

said true random number generator system further comprises;

a power connection operable to provide power from said general-purpose computer to said random number generator circuit.

21. A true random number generator system as in claim 16 wherein:

a random number generator circuit includes said source of analog random signals, said source of a clock signal, and said sampler; and

said random number generator circuit is located in said system at a location selected from the group consisting of the mother board of said general-purpose computer, an add-on board installed in said general-purpose computer, a separate module, and a peripheral of said general-purpose computer.

22. A true random number generator system comprising:

a hardware device for producing a binary true random sequence of signals; and

a computer for utilizing said binary true random sequence of signals;

wherein |B₂|≦

0.002 and |SD(t)|0.0004, where |B₂|is the fractional bias in the 1, 0 probability of said binary true random sequence of signals and SD(t) is the serial dependence as a function time of said binary true random sequence of signals.

23. A true random number generator system as in claim 22 wherein:

|B₂|≦

0.0004 and SD(t)≦

3.2×

10<sup>−

7</sup>.

24. A true random number generator system as in claim 22 wherein:

|B₂|3.2≦

10<sup>−

7</sup> and |SD(t)|≦

2.05≦

10<sup>−

13</sup>.

25. A method of producing a series of high-quality true random numbers, said method comprising the steps of:

producing a binary true random sequence of signals in which |B₂|≦

0.002 and |SD(t)|0.0004, where B₂ is the fractional bias in the 1, 0 probability of said binary true random sequence of signals and SD(t) is the serial dependence as a function time of said binary true random sequence of signals;

interfacing said binary true random sequence of signals to a computer; and

utilizing said binary true random sequence of signals in said computer.