Network device interface for digitally interfacing data channels to a controller via a network

• US 7,096,285 B2
• Filed: 12/04/2003
• Issued: 08/22/2006
• Est. Priority Date: 12/08/2000
• Status: Expired due to Term

• Current Assignee: The Boeing Co.
• Original Assignee: The Boeing Co.
• Inventors: Konz, Daniel W., Ellerbrock, Philip J., Grant, Robert L., Winkelmann, Joseph P.
• Primary Examiner(s): Dang, Khanh
• Application Number:
  US10/727,414
• Publication Number:
  US 20040123012A1
• Time in Patent Office: 992 Days
• Field of Search: 710/58, 710 60- 62, 710/64, 710/69, 710 72- 74, 341/70, 345/333, 345/361, 702/189, 709/224, 370/419
• US Class Current: 710/69
• CPC Class Codes: H04L 12/40032 Details regarding a bus interface enhancer
• CPC Class Codes: H04L 12/4135 using bit-wise arbitration
• CPC Class Codes: H04L 2012/40215 Controller Area Network CAN
• CPC Class Codes: H04L 2012/4028 the transportation system being an aircraft
• CPC Class Codes: H04L 25/4904 using self-synchronising codes, e.g. split-phase codes

Abstract

The present invention provides a network device interface and method for digitally connecting a plurality of data channels, such as sensors, actuators, and subsystems, to a controller using a network bus. The network device interface interprets commands and data received from the controller and polls the data channels in accordance with these commands. Specifically, the network device interface receives digital commands and data from the controller, and based on these commands and data, communicates with the data channels to either retrieve data in the case of a sensor or send data to activate an actuator. Data retrieved from the sensor is then converted by the network device interface into digital signals and transmitted back to the controller. In one advantageous embodiment, the network device interface is a state machine, such as an ASIC, that operates independent of a processor in communicating with the bus controller and data channels.

Claims

1. A serial, multiplexed communications system comprising:

a bus controller comprising a processor for issuing a plurality of commands or messages, wherein the commands or messages are issued in a serial manner;

a plurality of data channels for performing predefined functions in response to the commands or messages;

a common digital bus interconnecting said bus controller and said plurality of data channels for supporting serial communication therebetween; and

a plurality of network device interfaces, one of which is associated with each data channel for interconnecting said respective data channel with said common digital bus and communicating information from said bus controller to said data channel, wherein at least one of said network device interfaces comprises a state machine and does not comprise a general processor, and wherein said plurality of network device interfaces are connected to the common digital bus in parallel to perform predefined functions as parallel processes to thereby support high speed communication over said common digital bus.

2. A serial, multiplexed communications system according to claim 1 wherein said bus controller generates a synchronous clock signal which is provided to said network device interface such that said network device interface operates using the synchronous clock signal provided by said bus controller.

3. A serial, multiplexed communications system according to claim 1 wherein the plurality of data channels are selected from the group consisting of sensors and actuators.

4. A serial, multiplexed communications system according to claim 1 wherein said network device interface comprises a receiver for receiving messages from said bus controller via said common digital bus.

5. A serial, multiplexed communications system according to claim 1 wherein said network device interface comprises a device interface for providing commands to a data channel connected thereto and for receiving data from the associated data channel.

6. A serial, multiplexed communications system according to claim 1 wherein said network device interface comprises a transmitter for transmitting messages to said bus controller via said common digital bus.

7. A serial, multiplexed communications system according to claim 1, wherein said network device interface communicates with both said processor of said bus controller and a data channel connected to said network device interface.

8. A serial, multiplexed communications system according to claim 1 wherein said network device interface is an Application Specific Integrated Circuit (ASIC).

9. A serial, multiplexed communications system according to claim 1 wherein said network device interface receives commands from said bus controller and controls the data channel connected to said network device interface based on the command.

10. A serial, multiplexed communications system according to claim 1 wherein said network device interface receives data from said bus controller and provides the data to the data channel connected to said network device interface.

11. A serial, multiplexed communications system according to claim 1 wherein said network device interface receives data from the data channel connected to said network device interface, and wherein said network device interface sends the data to said bus controller.

12. A network device interface adapted to interconnect an associated data channel with a processor of a bus controller via a common serial, multiplexed, digital bus, the interface comprising:

a receiver for receiving messages from the bus controller via the common digital bus, wherein the messages are issued from the bus controller in a serial manner;

a device interface for providing commands to the associated data channel in response to messages received by said receiver and for receiving data from the associated data channel; and

a transmitter for transmitting messages to the bus controller via the common digital bus, wherein said network device interface is a state machine and does not comprise a general processor,

wherein said network device interface is one of a plurality of network device interfaces connected to the common digital bus in parallel to perform predefined functions as parallel processes to thereby support high speed communication over said common digital bus.

13. A network device interface according to claim 12 wherein said network device interface operates using a synchronous clock signal provided by said bus controller.

14. A network device interface according to claim 12 wherein said receiver receives synchronous clock signals from the bus controller via a common clock bus, and wherein said transmitter transmits messages in synchronization with the synchronous clock signals to the bus controller via the common digital bus.

15. A network device interface according to claim 12 wherein said receiver receives messages at a bit rate for a predetermined set of bit rates, and wherein said transmitter transmits messages at the same predetermined bit rate to the bus controller via the common digital bus.

16. A network device interface according to claim 12 wherein said receiver receives messages comprised of a plurality of bits having a value defined by a transition between first and second states, and wherein said device interface provides commands to the associated data channel at a predetermined time relative to the transition that defines the value of a respective bit of the message.

17. A network device interface according to claim 12 wherein said receiver receives messages comprised of a plurality of bits, wherein said receiver further receives a synchronous clock signal comprised of a plurality of clock pulses, and wherein said device interface provides commands to the associated data channel at a predetermined time as defined by a respective clock pulse which, in turn, is defined based upon a predetermined relationship to a respective bit of the message.

18. A serial, multiplexed communications system comprising:

a bus controller comprising a processor for issuing a plurality of commands, wherein the messages are issued from the bus controller in a serial manner;

at least one data channel for performing predefined functions in response to the commands;

a common digital bus interconnecting said bus controller and said data channel for supporting communication therebetween; and

a network device interface connected to said data channel for interconnecting said respective data channel with said common digital bus and communicating information from said bus controller to said data channel, wherein said network device interface comprises a state machine and does not comprise a general processor,

wherein said network device interface is one of a plurality of network device interfaces connected to the common digital bus in parallel to perform predefined functions as parallel processes to thereby support high speed communication over said common digital bus.

19. A serial, multiplexed communications system according to claim 18, wherein said network device interface provides commands from said bus controller to a data channel connected thereto and receives data from the associated data channel and transmits the data to said bus controller.

20. A serial, multiplexed communications system according to claim 18 wherein said bus controller generates a synchronous clock signal which is provided to said network device interface such that said network device interface operates using the synchronous clock signal provided by said bus controller.