Method and apparatus for diagonal routing by using several sets of lines
First Claim
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1. A method of routing sets of routable elements in a region of an integrated-circuit (“
- IC”
) layout, the method comprising;
a) using a first set of lines to partition the IC region into a plurality of sub-regions;
b) defining at least one particular route for each particular routable elements, wherein each particular route for each particular set traverses the set of sub-regions that contain the set of routable elements;
c) using a second set of lines to measure congestion of routes within the IC region, wherein at least a plurality of the lines in the second set are different from the lines in the first set, wherein the second set of lines includes intersecting diagonal lines that form a diagonal grid, wherein the first set of lines includes intersecting horizontal and vertical lines that form a first rectilinear grid,wherein the diagonal lines intersect at a center of the sub-regions created by the first set of lines.
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Abstract
Some embodiments provide a method of routing nets within a region of an integrated-circuit (“IC”) layout. The method uses a first set of lines to partition the IC region into a plurality of sub-regions. In addition, the method uses a second set of lines to measure congestion of routes for the nets within the IC region. According to this method, at least some of the lines in the second set are different from the lines in the first set.
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Citations
22 Claims
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1. A method of routing sets of routable elements in a region of an integrated-circuit (“
- IC”
) layout, the method comprising;a) using a first set of lines to partition the IC region into a plurality of sub-regions; b) defining at least one particular route for each particular routable elements, wherein each particular route for each particular set traverses the set of sub-regions that contain the set of routable elements; c) using a second set of lines to measure congestion of routes within the IC region, wherein at least a plurality of the lines in the second set are different from the lines in the first set, wherein the second set of lines includes intersecting diagonal lines that form a diagonal grid, wherein the first set of lines includes intersecting horizontal and vertical lines that form a first rectilinear grid, wherein the diagonal lines intersect at a center of the sub-regions created by the first set of lines.
- IC”
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2. A method of routing sets of routable elements within a region of an integrated-circuit (“
- IC”
) layout, the method comprising;a) partitioning the IC region into a plurality of sub-regions by using a first set of lines, wherein a plurality of diagonal routing paths exist between the sub-regions; b) identifying the capacity of diagonal routing paths based on a second set of lines, wherein at least a plurality of the lines in the second set are different from the lines in the first set; and c) using the identified capacities to define routes for the sets of routable elements, wherein a particular route for a particular set of routable elements traverses the set of sub-regions that contain the set of routable elements. - View Dependent Claims (3, 4, 5, 6, 7, 8)
- IC”
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9. A method of routing a set of routable elements in a layout, the method comprising:
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a) receiving a particular region of an integrated circuit (“
IC”
) layout,b) partitioning said region into a plurality of sub-regions, wherein a plurality of diagonal and non-diagonal routing paths exist between said sub-regions, wherein the diagonal routing paths are defined with respect to a first grid, and the non-diagonal routing paths are defined with respect to a second grid; and c) for the the set of routable elements, using at least one diagonal routing path and at least one non-diagonal routing path to define a route that connects the set of sub-regions that contain the set of routable elements. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. A method of routing a set of pins, within a particular region of an integrated circuit (“
- IC”
) layout, according to an octagonal wiring model, the method comprising;a) receiving the particular region of an integrated circuit (“
IC”
) layout,b) partitioning said region into a plurality of four-sided sub-regions, wherein a plurality of ±
45°
diagonal and Manhattan routing paths exist between said sub-regions, wherein the Manhattan routing paths are defined with respect to a first grid, and the ±
45°
diagonal routing paths are defined with respect to a second grid that is at 45°
with respect to the first grid; andc) using the diagonal and Manhattan routing paths to define a route that connects the set of sub-regions that contain the set of pins.
- IC”
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17. A computer readable medium comprising a computer program having executable code, the computer program for routing sets of routable elements within a region of an integrated-circuit (“
- IC”
) layout, the computer program comprising;a) a first set of instructions for partitioning the IC region into a plurality of sub-regions by using a first set of lines, wherein a plurality of diagonal routing paths exist between the sub-regions; b) a second set of instructions for identifying the capacity of diagonal routing paths based on a second set of lines, wherein at least a plurality of the lines in the second set are different from the lines in the first set; and c) a third set of instructions for using the identified capacities to define routes for the sets of routable elements, wherein a particular route for a particular set of routable elements traverses the set of sub-regions that contain the set of routable elements. - View Dependent Claims (18, 19, 20, 21, 22)
- IC”
Specification