Interconnect structure diffusion barrier with high nitrogen content

• US 7,098,537 B2
• Filed: 11/21/2003
• Issued: 08/29/2006
• Est. Priority Date: 11/21/2003
• Status: Expired due to Fees

• Current Assignee: Alsephina Innovations Inc. (Quarterhill Inc. (f/k/a Wi-LAN Inc.))
• Original Assignee: International Business Machines Corporation
• Inventors: Kim, Hyungjun, Rossnagel, Stephen M., Cabral, Cyril Jr., Kaldor, Steffen K.
• Primary Examiner(s): Smith, Zandra V.
• Assistant Examiner(s): BRYANT, KIESHA ROSE
• Application Number:
  US10/707,117
• Publication Number:
  US 20050110144A1
• Time in Patent Office: 1,012 Days
• Field of Search: 257/751, 257/758, 257/753
• US Class Current: 257/751
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

In an interconnect structure of an integrated circuit, a diffusion barrier film in a damascene structure is formed of a film having the composition TaN_x, where x is greater than 1.2 and with a thickness of 0.5 to 5 nm.

Claims

1. An integrated circuit comprising a set of active devices connected by a set of interconnect structures having at least one via extending to make electrical contact with another circuit element, in which at least some of the interconnect structures are formed by a conductive material embedded in an interlevel dielectric, the conductive material being separated from the dielectric by at least one liner layer having a substantially uniform chemical composition, in which said at least one liner layer is formed from a liner material having a thickness of less than 4 nm and comprising Tantalum and Nitrogen in an atomic concentration ratio less than 1.5 N:

Ta and greater than 1.2 with a failure temperature greater than 730 degrees Centigrade.

2. A method of fonning an interconnect structure according to claim 1, in which said liner layer is deposited with a thickness less than 2 nm.

3. An integrated circuit according to claim 1, in which said liner material extends over the bottom of said vias and the resistivity of said material is greater than 1000 micro-Ohm-cm.

4. An integrated circuit according to claim 3, in which the thickness of said material is less than 0.75 nm.

5. An integrated circuit comprising a set of active devices connected by a set of interconnect structures having at least one via extending to make direct electrical contact with another circuit element, in which at least some of the interconnect structures are formed by a conductive material embedded in an interlevel dielectric, the conductive material being separated from the dielectric by at least one a single liner layer having a substantially uniform chemical composition, in which said at least one liner layer is formed from a material comprising TaN_x and having a thickness less than 4 nm with a failure temperature of greater than 730 degrees Centigrade.

6. An integrated circuit according to claim 5, in which x is greater than 1.2 and less than 1.5.

7. An integrated circuit according to claim 5, in which said thickness is less than 0.75 nm.