Bilevel probe
First Claim
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1. An apparatus for electrical testing of semiconductor devices, comprising:
- a printed circuit board;
a first plurality of probe pins for probing bump connectors electrically and mechanically connected to the printed circuit board, wherein said first plurality of probe pins are connected to circuitry for trimming said printed circuit board; and
a second plurality of probe pins for probing probe pads electrically and mechanically connected to the printed circuit board, wherein said second plurality of probe pins are connected to circuitry for testing said printed circuit board, wherein each probe pin of the first plurality of probe pins has a tip, wherein each tip of the first plurality of probe pins is arranged to lie on a first plane and wherein each probe pin of the second plurality of probe pins has a tip, wherein each tip of the second plurality of probe pins is arranged to lie on a second plane different from the first plane.
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Abstract
An apparatus for electrical testing of semiconductor devices is provided. A printed circuit board is provided. A first plurality of probe pins for probing bump connectors is electrically and mechanically connected to the printed circuit board. A second plurality of probe pins for probing probe pads is electrically and mechanically connected to the printed circuit board.
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Citations
17 Claims
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1. An apparatus for electrical testing of semiconductor devices, comprising:
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a printed circuit board; a first plurality of probe pins for probing bump connectors electrically and mechanically connected to the printed circuit board, wherein said first plurality of probe pins are connected to circuitry for trimming said printed circuit board; and a second plurality of probe pins for probing probe pads electrically and mechanically connected to the printed circuit board, wherein said second plurality of probe pins are connected to circuitry for testing said printed circuit board, wherein each probe pin of the first plurality of probe pins has a tip, wherein each tip of the first plurality of probe pins is arranged to lie on a first plane and wherein each probe pin of the second plurality of probe pins has a tip, wherein each tip of the second plurality of probe pins is arranged to lie on a second plane different from the first plane. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for testing a die on a wafer, wherein the die has a plurality of bumped connectors and probe pads, comprising:
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placing a probe card over the wafer, wherein the probe card comprises a printed circuit board, a first plurality of probe pins for probing bump connectors electrically and mechanically connected to the printed circuit board, and a second plurality of probe pins for probing probe pads electrically and mechanically connected to the printed circuit board, wherein the first plurality of probe pins contact the bump connectors and the second plurality of probe pins contact the probe pads simultaneously; and running tests using the first plurality of probe pins and the second plurality of probe pins; and trimming said printed circuit board using the first plurality of probe pins during a same pass as said running of said tests, wherein each probe pin of the first plurality of probe pins has a tip, wherein each tip of the first plurality of probe pins is arranged to lie on a first plane and wherein each probe pin of the second plurality of probe pins has a tip, wherein each tip of the second plurality of probe pins is arranged to lie on a second plane different from the first plane. - View Dependent Claims (12, 13, 14, 15, 16, 17)
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Specification