Bilevel probe

• US 7,102,371 B1
• Filed: 05/19/2004
• Issued: 09/05/2006
• Est. Priority Date: 05/19/2004
• Status: Active Grant

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Ng, Fuen Siang, Chong, Sek Hoi, Gan, Chin Chai, Tang, Tze Kang
• Primary Examiner(s): PATEL, PARESH H
• Application Number:
  US10/850,229
• Time in Patent Office: 839 Days
• Field of Search: None
• US Class Current: 324/754.11
• CPC Class Codes: G01R 1/07342 the body of the probe being at an angle other than perpendicular to test object, e.g. probe card
• CPC Class Codes: G01R 1/07364 with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/05572 the external layer extending out of an opening
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An apparatus for electrical testing of semiconductor devices is provided. A printed circuit board is provided. A first plurality of probe pins for probing bump connectors is electrically and mechanically connected to the printed circuit board. A second plurality of probe pins for probing probe pads is electrically and mechanically connected to the printed circuit board.

Claims

1. An apparatus for electrical testing of semiconductor devices, comprising:

a printed circuit board;

a first plurality of probe pins for probing bump connectors electrically and mechanically connected to the printed circuit board, wherein said first plurality of probe pins are connected to circuitry for trimming said printed circuit board; and

a second plurality of probe pins for probing probe pads electrically and mechanically connected to the printed circuit board, wherein said second plurality of probe pins are connected to circuitry for testing said printed circuit board, wherein each probe pin of the first plurality of probe pins has a tip, wherein each tip of the first plurality of probe pins is arranged to lie on a first plane and wherein each probe pin of the second plurality of probe pins has a tip, wherein each tip of the second plurality of probe pins is arranged to lie on a second plane different from the first plane.

2. The apparatus, as recite in claim 1, wherein the semiconductor devices have probe pads and bump connectors, wherein the bump connectors have a height, wherein the first plane and second plane are displaced by a distance between half the height of the bump connectors and the height of the bump connectors.

3. The apparatus, as cited in claim 2, wherein the first plurality of pins have tip diameters and the second plurality of pins have tip diameters, wherein the tip diameters of the first plurality of pins is greater than the tip diameters of the second plurality of pins.

4. The apparatus, as recited in claim 3, wherein the tip diameters of the first plurality of pins are between 0.004 inch and 0.006 inch, and wherein the tip diameters of the second plurality of pins are between 0.0005 inch and 0.001 inch.

5. The apparatus, as recited in claim 3, wherein the first plurality of pins and the second plurality of pins are mechanically connected to the printed circuit board by epoxy.

6. The apparatus, as recited in claim 3, further comprising a first circuit on the printed circuit board for testing bump connectors electrically connected to the first plurality of probe pins and a second circuit on the printed circuit board for testing probe pads electrically connected to the second plurality of probe pins.

7. The apparatus, as recited in claim 1, wherein the first plurality of pins have tip diameters and the second plurality of pins have tip diameters, wherein the tip diameters of the first plurality of pins is greater than the tip diameters of the second plurality of pin.

8. The apparatus, as recited in claim 7, wherein the tip diameters of the first plurality of pins are between 0.004 inch and 0.006 inch, and wherein the tip diameters of the second plurality of pins are between 0.0005 inch and 0.001 inch.

9. The apparatus, as recited in claim 1, wherein the first plurality of pins and the second plurality of pins axe mechanically connected to the printed circuit board by epoxy.

10. The apparatus, as recited in claim 1, further comprising a first circuit on the printed circuit board for testing bump connectors electrically connected to the first plurality of probe pins and a second circuit on the printed circuit board for testing probe pads electrically connected to the second plurality of probe pins.

11. A method for testing a die on a wafer, wherein the die has a plurality of bumped connectors and probe pads, comprising:

placing a probe card over the wafer, wherein the probe card comprises a printed circuit board, a first plurality of probe pins for probing bump connectors electrically and mechanically connected to the printed circuit board, and a second plurality of probe pins for probing probe pads electrically and mechanically connected to the printed circuit board, wherein the first plurality of probe pins contact the bump connectors and the second plurality of probe pins contact the probe pads simultaneously; and

running tests using the first plurality of probe pins and the second plurality of probe pins; and

trimming said printed circuit board using the first plurality of probe pins during a same pass as said running of said tests, wherein each probe pin of the first plurality of probe pins has a tip, wherein each tip of the first plurality of probe pins is arranged to lie on a first plane and wherein each probe pin of the second plurality of probe pins has a tip, wherein each tip of the second plurality of probe pins is arranged to lie on a second plane different from the first plane.

12. The method, as recited in claim 11, wherein the running tests uses AC voltage, DC voltage, and current to and from the probe pins to perform measurements on the die.

13. The method, as recite in claim 12, wherein the semiconductor devices have probe pads and bump connectors, wherein the bump connectors have a height, wherein the first plane and second plane are displaced by a distance between half the height of the bump connectors and the height of the bump connectors.

14. The method, as recited in claim 11, wherein the first plurality of pins have tip diameters and the second plurality of pins have tip diameters, wherein the tip diameters of the first plurality of pins is greater than the tip diameters of the second plurality of pins.

15. The method, as recited in claim 14, wherein the tip diameters of the first plurality of pins are between 0.004 inch and 0.006 inch, and wherein the tip diameters of the second plurality of pins are between 0.0005 inch and 0.001 inch.

16. The method, as recited in claim 14, wherein the first plurality of pins and the second plurality of pins are mechanically connected to the printed circuit board by epoxy.

17. The method, as recited in claim 14, further comprising a first circuit on the printed circuit board for testing bump connectors electrically connected to the first plurality of probe pins and a second circuit on the printed circuit board for testing probe pads electrically connected to the second plurality of probe pins.