Methods and apparatus for speculative probing with early completion and delayed request
First Claim
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1. A computer system, comprising:
- a first cluster including a first plurality of processors and a first cache coherence controller, the first plurality of processors and the first cache coherence controller interconnected in a point-to-point architecture;
a second cluster including a second plurality of processors and a second cache coherence controller, the second plurality of processors and the second cache coherence controller interconnected in a point-to-point architecture, the first cache coherence controller coupled to the second cache coherence controller;
wherein the first cache coherence controller is configured to receive a cache access request originating from the first plurality of processors and send a probe to the first plurality of processors in the first cluster before the cache access request is received by a serialization point in the second cluster and wherein the first cache coherence controller is further configured to send the cache access request to the second cluster after receiving a probe response from the first cluster.
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Abstract
According to the present invention, methods and apparatus are provided for increasing the efficiency of data access in multiple processor, multiple cluster systems. A cache coherence controller associated with a first cluster of processors can determine whether speculative probing can be performed before forwarding a data access request to a second cluster. The cache coherence controller can send the data access request to the second cluster if the data access request can not be completed locally.
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Citations
51 Claims
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1. A computer system, comprising:
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a first cluster including a first plurality of processors and a first cache coherence controller, the first plurality of processors and the first cache coherence controller interconnected in a point-to-point architecture; a second cluster including a second plurality of processors and a second cache coherence controller, the second plurality of processors and the second cache coherence controller interconnected in a point-to-point architecture, the first cache coherence controller coupled to the second cache coherence controller; wherein the first cache coherence controller is configured to receive a cache access request originating from the first plurality of processors and send a probe to the first plurality of processors in the first cluster before the cache access request is received by a serialization point in the second cluster and wherein the first cache coherence controller is further configured to send the cache access request to the second cluster after receiving a probe response from the first cluster. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A computer system, comprising:
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a first cluster including a first plurality of processors and a first cache coherence controller, the first plurality of processors and the first cache coherence controller interconnected in a point-to-point architecture; a second cluster including a second plurality of processors and a second cache coherence controller, the second plurality of processors and the second cache coherence controller interconnected in a point-to-point architecture, the first cache coherence controller coupled to the second cache coherence controller and constructed to receive a cache access request originating from the first plurality of processors, send a probe to the first plurality of processors, receive responses to the probe, and send the cache access request to the second cluster after the responses to the probe have been received.
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11. A cache coherence controller, the cache coherence controller comprising:
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interface circuitry coupled to a plurality of local processors in a local cluster and a non-local cache coherence controller in a non-local cluster, wherein the plurality of local processors are arranged in a point-to-point architecture; a protocol engine coupled to the interface circuitry, the protocol engine configured to receive a cache access request from a first processor in the local cluster and speculatively probe a local node, wherein the protocol engine is configured to send the cache access request to the non-local cache coherence controller in the non-local cluster after receiving a probe response from the local node associated with the cache. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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27. A method for a cache coherence controller to manage data access in a multiprocessor system, the method comprising:
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receiving a cache access request from a local processor associated with a local cluster of processors connected through a point-to-point architecture; determining if speculative probing of a local node associated with a cache can be performed before forwarding the cache access request to a non-local cache coherence controller, the non-local cache coherence controller associated with a remote cluster of processors connected through a point-to-point architecture, wherein the remote cluster of processors shares an address space with the local cluster of processors sending the cache access request to the non-local cache coherence controller after receiving a probe response from the local node associated with the cache. - View Dependent Claims (28, 29, 30, 31, 32, 33, 34, 35, 36)
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37. An apparatus for managing data access in a multiprocessor system, the apparatus comprising:
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means for receiving a cache access request from a local processor associated with a local cluster of processors connected through a point-to-point architecture; means for determining if speculative probing of a local node associated with a cache can be performed before forwarding the cache access request to a non-local cache coherence controller, the non-local cache coherence controller associated with a remote cluster of processors connected through a point-to-point architecture, wherein the remote cluster of processors shares an address space with the local cluster of processors means for sending the cache access request to the non-local cache coherence controller after receiving a probe response from the local node associated with the cache. - View Dependent Claims (38, 39, 40, 41, 42, 43, 44, 45, 46)
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47. A method for a cache coherence controller to manage data access in a multiprocessor system, the method comprising:
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receiving a cache access request originating from a first cluster of processors including a cache coherence controller and a plurality of processors interconnect in a point-to-point architecture; sending a probe to nodes associated with the first cluster of processors; receiving responses to the probe; and sending the cache access request to a second cluster of processors after receiving responses to the probe. - View Dependent Claims (48, 49, 50, 51)
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Specification