Method for designing semiconductor circuit device, utilizing boundary cells between first and second circuits driven by different power supply systems

• US 7,103,866 B2
• Filed: 04/23/2004
• Issued: 09/05/2006
• Est. Priority Date: 05/09/2003
• Status: Expired due to Fees

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: NEC Electronics Corporation (Renesas Electronics Corporation)
• Inventors: Katoh, Tetsuya, Kashiwagi, Yoshiki
• Primary Examiner(s): Chiang, Jack
• Assistant Examiner(s): TO, TUYEN P
• Application Number:
  US10/830,019
• Publication Number:
  US 20040225985A1
• Time in Patent Office: 865 Days
• Field of Search: 716/10, 716/9
• US Class Current: 716/120
• CPC Class Codes: G06F 30/30 Circuit design

Abstract

To design a chip having a plurality of circuit areas driven by different power supplies, a boundary cell to be inserted on the boundary between the circuit areas is prepared. After creating a logic circuit netlist with a design tool, the boundary cell is inserted on the boundary. The boundary cell is connected on a signal transmission path between the circuit areas. A circuit for suppressing shoot-through current or leakage current is used as the boundary circuit. By preparing the boundary cell in a cell library, chip design is facilitated.

Claims

1. A method of designing a semiconductor circuit device, comprising the steps of:

generating first circuit data comprising information on a first circuit driven by a voltage from a first power system;

generating second circuit data comprising information on a second circuit driven by a voltage from a second power system different from the first power system;

obtaining cell data prestored in a storage medium and comprising information on a boundary circuit; and

generating boundary circuit connection information indicating that the boundary circuit is connected on a transmission path between the first circuit and the second circuit wherein the boundary circuit comprises a suppressing circuit for suppressing shoot-through current of a boundary between the first circuit and the second circuit, said suppressing circuit including a logic circuit receiving an enable signal in a first state from one of said first circuit and second circuit which is ON for suppressing said shoot-through current of the boundary between said first circuit and second circuit when the other of said first circuit and second circuit is OFF, and receiving an enable signal in a second state for enabling signal transfer between said first and second circuits when each of said first and second circuits are ON.

2. The method of designing a semiconductor circuit device according to claim 1, wherein the boundary circuit further comprises a circuit for level conversion between the first circuit and the second circuit.

3. The method of designing a semiconductor circuit device according to claim 1, wherein the boundary circuit further comprises a protection circuit for protecting a transistor in the first circuit and/or the second circuit from electrostatic discharge.

4. The method of designing a semiconductor circuit device according to claim 1, wherein the first circuit data, the second circuit data, and the cell data are data for logic circuit design.

5. The method of designing a semiconductor circuit device according to claim 1, wherein the first circuit data, the second circuit data, and the cell data are data for layout design.

6. The semiconductor circuit device designed by a method of designing a semiconductor circuit device according to claim 1.

7. A method of designing a semiconductor circuit device, comprising the steps of:

generating first circuit data comprising information on a first circuit driven by a voltage from a first power system;

generating second circuit data comprising information on a second circuit driven by a voltage from a second power system different from the first power system;

obtaining cell data prestored in a storage medium and comprising information on a boundary circuit; and

generating boundary circuit connection information indicating that the boundary circuit is connected on a transmission path between the first circuit and the second circuit

wherein the boundary circuit comprises a circuit for preventing circuit malfunction due to an indeterminate signal between the first circuit and the second circuit when a power supply of the first circuit is OFF, and a power supply of the second circuit is ON.

8. A method of designing a semiconductor circuit device, comprising the steps of:

generating first circuit data comprising information on a first circuit driven by a voltage from a first power system;

generating second circuit data comprising information on a second circuit driven by a voltage from a second power system different from the first power system;

obtaining cell data prestored in a storage medium and comprising information on a boundary circuit; and

generating boundary circuit connection information indicating that the boundary circuit is connected on a transmission path between the first circuit and the second circuit

wherein the boundary circuit comprises a suppressing circuit for suppressing leakage current of a boundary between the first circuit and the second circuit, said suppressing circuit including a logic circuit receiving an enable signal in a first state from one of said first circuit is and second circuit which is ON for suppressing said leakage current of the boundary between said first circuit and second circuit when the other of said first circuit and second circuit is OFF, and receiving an enable signal in a second state for enabling signal transfer between said first and second circuits when each of said first and second circuits are ON.