Amplifying circuit

• US 7,106,131 B2
• Filed: 01/13/2004
• Issued: 09/12/2006
• Est. Priority Date: 04/14/2003
• Status: Active Grant

• Current Assignee: Realtek Semiconductor Corp.
• Original Assignee: Realtek Semiconductor Corp.
• Inventors: Lee, Chao-Cheng, Chang, Chia-Jun
• Primary Examiner(s): Nguyen, Linh V.
• Application Number:
  US10/707,803
• Publication Number:
  US 20040201419A1
• Time in Patent Office: 973 Days
• Field of Search: 330/9, 330/69, 330/254, 330/282, 330/284, 330/294, 341/143, 341/172
• US Class Current: 330/69
• CPC Class Codes: H03F 3/005 using switched capacitors, e.g. dynamic amplifiers; using switched capacitors as resistors in differential amplifiers H03F3/45 takes precedence
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit

Abstract

An amplifying circuit includes a differential amplifier having a positive input end, a negative input end, a positive output end, and a negative output end; a first input impedance coupled between the negative input end and a first input signal; a second input impedance coupled between the positive input end and the first input signal; a third input impedance coupled between the negative input end and a second input signal; a fourth input impedance coupled between the positive input end and the second input signal; a first output impedance coupled between the negative input end and the positive output end; a second output impedance coupled between the negative input end and the negative output end; a third output impedance coupled between the positive input end and the positive output end; and a fourth output impedance coupled between the positive input end and the negative output end.

Claims

1. A circuit comprising:

an operational amplifier comprising a positive input end, a negative input end, and an output end;

a first input impedance coupled between the negative input end and a first input signal;

a second input impedance coupled between the negative input end and a second input signal; and

a first output impedance coupled between the negative input end and the output end;

wherein resistances of the first and second input impedances are controlled by a first and a second control signals respectively, so that the resistances of the first and second input impedances are substantially different from each other and are close to each other.

2. The circuit of claim 1 wherein the first input impedance is a switched capacitor circuit, the switched capacitor circuit comprises;

a capacitor coupled between a first node and a second node;

a first switch with one end coupled to the first node and another end used as an end of the switched capacitor circuit;

a second switch coupled between the first node and a common node;

a third switch with one end coupled to the second node and another end used as another end of the switched capacitor circuit; and

a fourth switch coupled between the second node and the common node.

3. The circuit of claim 1 wherein the circuit has a high input impedance characteristic.

4. The circuit of claim 1 wherein the first output impedance is a resistive-impedance, the circuit has a high voltage attenuation characteristic.

5. The circuit of claim 1 wherein the first output impedance is a capacitive-impedance, the circuit has a large time constant characteristic.

6. The circuit of claim 1 wherein the first input impedance is a switched capacitor circuit, the switched capacitor circuit comprises:

a capacitor coupled between a first node and a common node;

a first switch with one end coupled to the first node and another end used as an end of the switched capacitor circuit; and

a second switch with one end coupled to the first node and another end used as another end of the switched capacitor circuit,

wherein the first switch and the second switch are turned on alternately by the first control signal.

7. A circuit comprising:

a differential amplifier comprising a positive input end, a negative input end, a positive output end, and a negative output end;

a first input impedance coupled between the negative input end and a first input signal;

a second input impedance coupled between the positive input end and the first input signal;

a third input impedance coupled between the negative input end and a second input signal, the third input impedance being substantially equivalent to the second input impedance; and

a fourth input impedance coupled between the positive input end and the second input signal, the fourth input impedance being substantially equivalent to the first input impedance;

wherein resistances of the first and second input impedances are controlled by a first and a second control signals respectively.

8. The circuit of claim 7 wherein resistances of the first and second input impedances are close to each other.

9. The circuit of claim 8 wherein the circuit has a high input impedance characteristic.

10. The circuit of claim 7 further comprising:

a first output impedance coupled between the negative input end and the positive output end; and

a second output impedance coupled between the positive input end and the negative output end.

11. The circuit of claim 10 wherein the first and the second output impedances are a resistive-impedance, the circuit has a high voltage attenuation characteristic.

12. The circuit of claim 10 wherein at least one the first and the second output impedance is a capacitive-impedance, the circuit has a large time constant characteristic.

13. The circuit of claim 7 wherein the first input impedance is a switched capacitor circuit, the switched capacitor circuit comprises:

a capacitor coupled between a first node and a ground end;

a first switch with one end coupled to the first node and another end used as an end of the switched capacitor circuit; and

a second switch with one end coupled to the first node and another end used as another end of the switched capacitor circuit,

wherein the first switch and the second switch are turned on alternately by the first control signal.

14. The circuit of claim 7 wherein the resistances of the first and second input impedances are so controlled by the first and the second control signals respectively, that they are substantially different from each other.

15. A circuit comprising:

a differential amplifier comprising a positive input end, a negative input end, a positive output end, arid a negative output end;

a first input impedance coupled between the negative input end and a first input signal;

a second input impedance coupled between the positive input end and a second input signal;

a first output impedance coupled between the negative input end and the positive output end;

a second output impedance coupled between the negative input end and the negative output end;

a third output impedance coupled between the positive input end and the positive output end, the third output impedance being substantially equivalent to the second output impedance; and

a fourth output impedance coupled between the positive input end and the negative output end, the fourth output impedance being substantially equivalent to the first output impedance,

wherein resistances of the first and second output impedances are controlled by a first and a second control signals respectively;

wherein the resistances of the first and the second output impedances are close to each other.

16. The circuit of claim 15 wherein the resistances of the first and the second output impedances are so controllcd by the first and the second control signals as to be substantially different from each other.

17. The circuit of claim 16 wherein thc first and the second input impedance is a resistive-impedance, the circuit has a high voltage gain characteristic.

18. The circuit of claim 16 wherein at least one the first and the second input impedance is a capacitive-impedance, the circuit has a large time constant characteristic.

19. The circuit of claim 15 wherein the first output impedance is a switched capacitor circuit, the switched capacitor circuit comprises:

a capacitor coupled between a first node and a ground end;

a first switch with one end coupled to the first node and another end used as an end of the switihed capacitor circuit; and

a second switch with one end coupled to the first node and another end used as another end of the switched capacitor circuit,

wherein the first switch and the second switch are turned on alternately by the first control signal.

20. A circuit comprising:

a differential amplifier comprising a positive input end, a negative input end, a positive output end, and a negative output end;

a first input impedance coupled between the negative input end and a first input signal;

a second input impedance coupled between the positive input end and the first input signal;

a third input impedance coupled between the negative input end and a second input signal, the third input impedance being substantially equivalent to the second input impedance;

a fourth input impedance coupled betwcen the positive input end and the second input signal, the fourth input impedance being substantially equivalent to the first input impedance;

a first output impedance coupled between the negative input end and the positive output end;

a second output impedance coupled between the negative input end and the negative output end;

a third output impedance coupled between the positive input end and the positive output end, the third output impedance being substantially equivalent to the second output impedance; and

a fourth output impedance coupled between the positive input end and the negative output end, the fourth output impedance being substantially equivalent to the first output impedance,

wherein the positive output end is for outputting a first output signal, and the negative output end is for outputting a second output signal.

21. The circuit of claim 20 wherein the first input impedance, the second input impedance, the third input impedance, the fourth input impedance, the first output impedance, the second output impedance, the third output impedance, or the fourth output impedance is a switched capacitor circuit.