Comparator circuit

• US 7,109,761 B2
• Filed: 02/17/2005
• Issued: 09/19/2006
• Est. Priority Date: 02/25/2004
• Status: Expired due to Fees

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: Isomura, Hirofumi
• Primary Examiner(s): Ton, My-Trang Nu
• Application Number:
  US11/059,389
• Publication Number:
  US 20050184761A1
• Time in Patent Office: 579 Days
• Field of Search: 327 77- 79, 327/81, 327/87, 327/89, 327/321, 327/328
• US Class Current: 327/77
• CPC Class Codes: H03K 17/302 in field-effect transistor switches
• CPC Class Codes: H03K 3/02337 Bistables with hysteresis, e.g. Schmitt trigger non-regenerative amplitude discriminators G01R19/165
• CPC Class Codes: H03K 5/2481 with at least one differential stage

Abstract

A reference voltage and an input signal voltage are applied to gates of FETs each equipped with a LOCOS-drain structure, respectively, and currents according to the voltages are made to flow from a power supply voltage Vbat to drain sides through resistors and sources, respectively. The currents are made to flow in FETs to be converted to voltages. Then, both voltages are compared in a comparator. When a potential of a reference voltage input terminal in the comparator that operates with power provided by a power supply Vcc tends to rise above a predetermined level, a FET is turned on and clamps the voltage so as to suppress its potential rise.

Claims

1. A comparator circuit constructed with MOSFETs of a LOCOS-drain structure formed on a P-type silicon substrate, the comparator circuit comprising:

a first P-channel MOSFET of the LOCOS-drain structure having a source connected to a first power supply, which supplies a first supply voltage, through a first resistance element and a gate to which a reference voltage is applied;

a second P-channel MOSFET of the LOCOS-drain structure having a source connected to the first power supply through a second resistance element and a gate to which an input signal voltage is applied;

a current mirror circuit connected between drains of the first and the second P-channel MOSFETs and a ground;

a comparison operation unit having a reference voltage input terminal and a comparison voltage input terminal, which are connected to the drains of the first and the second P-channel MOSFETs, respectively, and comparing the input signal voltage and the reference voltage, with power being provided from a second power supply, which supplies a second supply voltage lower than the first supply voltage of the first power supply; and

voltage clamping means, disposed on a reference voltage input terminal side of the comparison operation unit, for performing a clamp operation when a potential of the terminal tends to rise above a predetermined level.

2. The comparator circuit according to claim 1, further comprising:

reference voltage varying means including a series resistor circuit composed of a plurality of resistance elements connected in series, and connected between the first power supply and the ground,

wherein the gate of the first P-channel MOSFET is connected to any of common junction points in the series resistor circuit, and that varies the reference voltage in response to a variation in a level of a signal outputted by the comparison operation unit by bypassing a resistance element connected closer to the ground than a reference voltage setting point of the series resistor circuit.

3. The comparator circuit according to claim 2, wherein the reference voltage varying means includes a MOSFET of the LOCOS-drain structure to bypass the resistance element.

4. The comparator circuit according to claim 1, further comprising:

a plurality of series resistance elements connected between the first power supply and the source of the first P-channel MOSFET;

a second plurality of series resistance elements having a resistance value equal to a resistance value of the plurality of series resistance elements and arranged between the first power supply and the source of the second P-channel MOSFET; and

threshold varying means for varying a threshold voltage in the comparison operation unit in response to a variation in a level of an signal of the comparison operation unit by bypassing one or more of the series resistance elements connected to a source side of the first P-channel MOSFET, providing an alternative path to a first power supply side,

wherein the reference voltage is applied directly from the outside.

5. The comparator circuit according to claim 4, wherein the threshold voltage varying means includes:

a MOSFET of the LOCOS-drain structure having a gate connected to an output terminal of the comparison operation unit;

a plurality of resistance elements connected in series with the MOSFET between the first power supply and the ground; and

a P-channel MOSFET having a gate connected to any of common junction points in the plurality of resistance elements, a source connected to the first power source and a drain connected to a resistance element that is to be bypassed.

6. The comparator circuit according to claim 1, wherein the voltage clamping means includes an N-channel MOSFET, which has a drain and a gate connected to the reference voltage input terminal and has a source connected to the comparison voltage input terminal.