Reflective arrayed waveguide grating

• US 7,110,627 B2
• Filed: 10/15/2003
• Issued: 09/19/2006
• Est. Priority Date: 10/24/2002
• Status: Expired due to Fees

• Current Assignee: Applies Research & Photonics, Inc.
• Original Assignee: Applied Research And Photonics, Inc.
• Inventors: Rahman, Anis
• Primary Examiner(s): KIANNI, KAVEH C
• Application Number:
  US10/605,638
• Publication Number:
  US 20040105610A1
• Time in Patent Office: 1,070 Days
• Field of Search: 385/14, 385/15, 385/17, 385/18, 385/31, 385/37
• US Class Current: 385/14
• CPC Class Codes: G02B 6/12007 forming wavelength selective elements, e.g. multiplexer, demultiplexer
• CPC Class Codes: G02B 6/12011 characterised by the arrayed waveguides, e.g. comprising a filled groove in the array section
• CPC Class Codes: G02B 6/12019 characterised by the optical interconnection to or from the AWG devices, e.g. integration or coupling with lasers or photodiodes coupling integrated waveguide to fibre G02B6/30, to optoelectronic element G02B6/42; monolithic integration of integrated waveguides with other optical elements G02B6/12004

Abstract

This invention discloses a “reflective arrayed waveguide grating,” (RAWG) for demultiplexing a multiplexed optical signal into its component wavelengths and for multiplexing n optical signals into a multiplexed signal. The present invention found that a single slab can be used for coupling the signal in and for focusing the signal out of the array of waveguide that functions as a grating; and a single external fiber array interface containing plurality of fibers can be used for both inputting the signal in and for outputting the signal from the RAWG. Advantageously, this method reduces the chip size and on-chip insertion loss by eliminating a slab and using 50% shorter waveguides in the array allowing significant savings of the silicon real estate. The smaller chip size increases the reliability of the device significantly and almost doubles the yield of chips per wafer. Additionally, used as a building block, these chips can enable further functionality enhancement via tiers of monolithic triple-phase integration.

Claims

1. A second-phase photonic integrated circuit comprising

a photonic integrated circuit, the photonic integrated circuit comprising:

An input/output interface arranged on a substrate comprising a plurality of waveguides for simultaneously inputting at least one signal to an outputting at least one signal from the photonic integrated circuit for demultiplexing a multiplexed optical signal in to n different constituent wavelengths and for combining n input optical signals composed of n different constituent wavelengths in to a multiplexed signal;

a slab waveguide arranged on the substrate having a first end and a second end, the first end coupled to the plurality of waveguides of the input/output interface to focus the at least one input signal to the second end, and the second end coupled to an array waveguide, for focusing the at least one output signal to the input/output interface through the first end;

the array waveguide arranged on the substrate comprising a plurality of waveguides for coupling the one or more input signals, separating the one or more input signals into the n different constituent wavelengths and focusing the n different constituent wavelengths back on to the slab waveguide first end coupling to the input/output interface, the plurality of waveguides of the array waveguide being optically coupled at one end with the second end of the slab waveguide, and terminating at an opposing end of the array waveguide by a reflective mirror, each waveguide of said array waveguide having a predetermined path difference between successive waveguides; and

the reflective mirror integrally disposed and formed along an edge of the integrated circuit at the opposing end of the array waveguide for reflecting the one or more signals incident on it from the array waveguide back into the array waveguide;

and an active unit formed on the substrate, the active unit connected to the photonic integrated circuit by a waveguide interconnect means,

where the amplifier block is comprised of a material that absorbs light in the 890 nanometer and the 1480 nanometer regions and emits light in the 1310 nanometer and 1550 nanometer regions.

2. The second-phase photonic integrated circuit as set forth in claim 1, wherein the amplifier block material is selected from one of the following:

erbium doped dendrimer or glass.

3. A second-phase photonic integrated circuit comprising:

a photonic integrated circuit, the photonic integrated circuit comprising;

An input/output interface arranged on a substrate comprising a plurality of waveguides for simultaneously inputting at least one signal to and outputting at least one signal from the photonic integrated circuit for demultiplexing a multiplexed optical signal in to n different constituent wavelengths and for combining n input optical signals composed of n different constituent wavelengths in to a multiplexed signal;

a slab waveguide arranged on the substrate having a first end and a second end, the first end coupled to the plurality of waveguides of the input/output interface to focus the at least one input signal to the second end, and the second end coupled to an array waveguide, for focusing the at least one output signal to the input/output interface through the first end;

the array waveguide arranged on the substrate comprising a plurality of waveguides for coupling the one or more input signals, separating the one or more input signals into the n different constituent wavelengths and focusing the n different constituent wavelengths back on to the slab waveguide first end coupling to the input/output interface, the plurality of waveguides of the array waveguide being optically coupled at one end with the second end of the slab waveguide, and terminating at an opposing end of the array waveguide by a reflective mirror, each waveguide of said array waveguide having a predetermined path difference between successive waveguides; and

the reflective mirror integrally disposed and formed along an edge of the integrated circuit at the opposing end of the array waveguide for reflecting the one or more signals incident on it from the array waveguide back into the array waveguide;

and an active unit formed on the substrate, the active unit connected to the photonic integrated circuit by a waveguide interconnect means,

a signal processing unit coupled to the photonic integrated circuit for electro-optically processing the input and output signals,

wherein the signal processing unit is a modulator block;

wherein the modulator block is connected to the photonic integrated circuit through a first waveguide interconnect, and the photonic integrated circuit is connected to the active unit through a second waveguide interconnect.