Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices

• US 7,111,140 B2
• Filed: 04/26/2004
• Issued: 09/19/2006
• Est. Priority Date: 07/31/1995
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Lexar Media Incorporated (Micron Technology, Inc.)
• Inventors: Estakhri, Petro, Iman, Berhanu
• Primary Examiner(s): McLean-Mayo, Kimberly
• Application Number:
  US10/832,421
• Publication Number:
  US 20040199714A1
• Time in Patent Office: 876 Days
• Field of Search: 711/168, 711/103, 711/150, 711/202, 711/5, 365/189.04, 365/230.03, 365/210, 365/200, 365/185.11, 360/49, 360/39, 360/54, 360/31
• US Class Current: 711/168
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G06F 12/0238 Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 3/0613 in relation to throughput
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G11C 16/08 Address circuits; Decoders; Word-line control circuits
• CPC Class Codes: G11C 16/102 External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
• CPC Class Codes: G11C 29/765 in solid state disks
• CPC Class Codes: G11C 29/82 for EEPROMs

Abstract

In one embodiment of the present invention, a memory storage system for storing information organized in sectors within a nonvolatile memory bank is disclosed. The memory bank is defined by sector storage locations spanning across one or more rows of a nonvolatile memory device, each the sector including a user data portion and an overhead portion. The sectors being organized into blocks with each sector identified by a host provided logical block address (LBA). Each block is identified by a modified LBA derived from the host-provided LBA and said virtual PBA, said host-provided LBA being received by the storage device from the host for identifying a sector of information to be accessed, the actual PBA developed by said storage device for identifying a free location within said memory bank wherein said accessed sector is to be stored. The storage system includes a memory controller coupled to the host; and a nonvolatile memory bank coupled to the memory controller via a memory bus, the memory bank being included in a non-volatile semiconductor memory unit, the memory bank has storage blocks each of which includes a first row-portion located in said memory unit, and a corresponding second row-portion located in each of the memory unit, each of the memory row-portions provides storage space for two of said sectors, wherein the speed of performing write operations is increased by writing sector information to the memory unit simultaneously.

Claims

1. A memory storage system for increasing the performance of write operations of sector information to storage locations within non-volatile memory unit, the sector locations organized into sub-blocks and a plurality of sub-blocks defining a block comprising:

memory control circuitry, coupled to the non-volatile memory unit for receiving user data of sector information included in a sector, from a host, said received user data identifiable by addresses of a predetermined order, said memory control circuitry for writing said received user data to a first storage location of a particular sub-block of a particular block, said memory control circuitry for further writing user data of sector information to a first storage location of a sub-block of the particular block that is other than the particular sub-block regardless of the predetermined order of the addresses of the received sectors, a single virtual physical block address selectable based upon the identification of a free storage location within said non-volatile memory unit for identifying the storage locations of said sub-block of the particular block,

wherein writing of sector information to the first storage location of the sub-blocks of the particular block is performed substantially concurrently thereby increasing the performance of write operations.

2. A memory storage system as recited in claim 1 wherein said non-volatile memory unit includes one or more nonvolatile memory devices.

3. A memory storage system for increasing the performance of programming operations of sector information to storage locations within non-volatile memory unit, the sector locations organized into sub-blocks and a plurality of sub-blocks defining a block comprising:

memory control circuitry, coupled to the non-volatile memory unit, for receiving user data of sectors of information from the host, said received user data of sectors of information identifiable by addresses of a predetermined order, said memory control circuitry for programming sector information, received from the host, to a first storage location of a particular sub-block of a particular block, said memory control circuitry for further programming said user data of said sectors of information to a first storage location of a sub-block of the particular block that is other than the particular sub-block regardless of the predetermined order of the addresses of the received sectors, a single virtual physical block address selectable based upon the identification of a free storage location within said non-volatile memory unit for identifying the storage locations of said sub-block of the particular block,

wherein programming of sector information to the first storage location of the sub-blocks of the particular block is performed substantially concurrently thereby increasing the performance of programming operations.

4. A memory storage system as recited in claim 3 wherein said non-volatile memory unit includes one or more nonvolatile memory devices.