Method and system for external clock to obtain multiple synchronized redundant computers
First Claim
1. A method for synchronizing a plurality of processors within a computer system wherein the computer system includes a plurality of processors, each processor communicatively coupled to a respective network that is independent of each other network, said method comprising:
- receiving a plurality of input signals at a first rate from at least one source;
transmitting each input signal of the plurality of input signals to a reference object;
transforming each input signal to a known temporal reference;
generating a reference signal in each processor based on the transformed input signal wherein each reference signal is in a known temporal relationship with a reference signal in each other processor;
executing a plurality of processes in each processor based on each respective reference signal, wherein the computer system includes a plurality of node electronic units, each of the plurality of node electronics units communicatively coupled to at least one network;
transmitting a transreference signal over the network, the transreference signal based on the reference signal;
executing node electronics unit internal processes based on a first clock;
receiving the transreference signal at the node electronics unit; and
executing a referencing process when the transreference signal is received, wherein executing a referencing process further comprises;
determining a status of the transreference signal based on the first clock;
recording a receipt time of the transreference signal based on the first clock;
determining a first clock error based on at least one of the first clock time, the transreference signal, the determined status of the transreference signal, and the order of preference of the processor from which the transreference signal was received;
adjusting the first clock based on the error calculation; and
synchronizing node electronics unit processes based on the adjusted first clock.
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Accused Products
Abstract
A method for synchronizing a plurality of processors within a computer system is provided. The computer system includes a plurality of processors that are each communicatively coupled to a respective network wherein each network is independent of each other network. The method includes receiving a plurality of input signals at a first rate from at least one source, transmitting the input signals to a reference object, and transforming the input signal to a known temporal reference. The apparatus is configured to receive a plurality of input signals at a first rate from at least one source, transmit the input signals to a reference object, and transform the input signal to a known temporal reference.
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Citations
61 Claims
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1. A method for synchronizing a plurality of processors within a computer system wherein the computer system includes a plurality of processors, each processor communicatively coupled to a respective network that is independent of each other network, said method comprising:
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receiving a plurality of input signals at a first rate from at least one source; transmitting each input signal of the plurality of input signals to a reference object; transforming each input signal to a known temporal reference; generating a reference signal in each processor based on the transformed input signal wherein each reference signal is in a known temporal relationship with a reference signal in each other processor; executing a plurality of processes in each processor based on each respective reference signal, wherein the computer system includes a plurality of node electronic units, each of the plurality of node electronics units communicatively coupled to at least one network; transmitting a transreference signal over the network, the transreference signal based on the reference signal; executing node electronics unit internal processes based on a first clock; receiving the transreference signal at the node electronics unit; and executing a referencing process when the transreference signal is received, wherein executing a referencing process further comprises; determining a status of the transreference signal based on the first clock; recording a receipt time of the transreference signal based on the first clock; determining a first clock error based on at least one of the first clock time, the transreference signal, the determined status of the transreference signal, and the order of preference of the processor from which the transreference signal was received; adjusting the first clock based on the error calculation; and synchronizing node electronics unit processes based on the adjusted first clock. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method for synchronizing a plurality of processors within a computer system, each processor communicatively coupled to a respective network that is independent of each other network, said method comprising:
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receiving a plurality of input signals at a first rate from at least one source; transmitting each input signal of the plurality of input signals to a reference object; transforming each input signal to a known temporal reference; generating a reference signal in each processor based on the transformed input signal wherein each reference signal is in a known temporal relationship with a reference signal in each other processor; and executing a plurality of processes in each processor based on each respective reference signal, wherein each processor includes a corrector function and wherein the method further comprises determining a status of a first input signal based on the first input signal and each other input signal, and wherein determining a status of a first input signal comprises at least one of determining a presence of the first input signal within an expected time window, determining an absence of the first input signal, determining an invalid first input signal, and determining a noisy first input signal. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25)
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26. A method for synchronizing a plurality of processors within a computer system wherein the computer system includes a plurality of processors, each processor communicatively coupled to a respective network that is independent of each other network, said method comprising:
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receiving a plurality of input signals at a first rate from at least one source; transmitting each input signal of the plurality of input signals to a reference object; transforming each input signal to a known temporal reference; generating a reference signal in each processor based on the transformed input signal wherein each reference signal is in a known temporal relationship with a reference signal in each other processor; executing a plurality of processes in each processor based on each respective reference signal, wherein each processor includes a corrector function; determining a status of a first input signal based on the first input signal and each other input signal; and generating a reference signal based on a transformed input signal wherein the transformation is modified when at least one of the occurrence of a second event and the occurrence of a transition to a satisfactory status of at least one input signal. - View Dependent Claims (27, 28, 29)
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30. Apparatus for synchronizing a plurality of processors within a computer system, said computer system comprising a plurality of processors, each said processor communicatively coupled to a respective network that is independent of each other network, said apparatus comprising:
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means for receiving a plurality of input signals at a first rate from at least one source; means for transmitting the input signals to a reference object; means for transforming the input signal to a known temporal reference; means for generating a reference signal in each processor based on the transformed input signal wherein each reference signal is in a known temporal relationship with a reference signal in each other processor; means for executing a plurality of processes in each processor based on each respective reference signal, wherein said computer system further comprises a plurality of node electronic units, each of said plurality of node electronics units communicatively coupled to at least one network, and wherein the apparatus further comprises means for transmitting a transreference signal over the network, the transreference signal based on the reference signal, wherein each said node electronics units comprises at least one clock, and wherein said apparatus further comprises; means for executing node electronics unit internal processes based on a first clock; means for receiving the transreference signal at the node electronics unit; and means for executing a referencing process when the transreference signal is received; means for determining a status of the transreference signal based on the first clock; means for recording a receipt time of the transreference signal based on the first clock; means for determining a first clock error based on at least one of the first clock time, the transreference signal, the determined status of the transreference signal, and the order of preference of the processor from which the transreference signal was received; means for adjusting the first clock based on the error calculation; and means for synchronizing node electronics unit processes based on the adjusted first clock. - View Dependent Claims (31, 32, 33, 34, 35, 36, 37, 38)
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39. Apparatus for synchronizing a plurality of processors within a computer system, each processor of said plurality of processors being communicatively coupled to a respective network that is independent of each other network, said apparatus comprising:
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means for receiving a plurality of input signals at a first rate from at least one source; means for transmitting the input signals to a reference object; means for transforming the input signal to a known temporal reference; means for generating a reference signal in each processor based on the transformed input signal wherein each reference signal is in a known temporal relationship with a reference signal in each other processor; means for executing a plurality of processes in each processor based on each respective reference signal;
wherein each processor includes a corrector function and wherein said apparatus further comprises means for determining a status of a first input signal based on the first input signal and each other input signal; andat least one selected from the groups consisting of;
means for determining a presence of the first input signal within an expected time window, means for determining an absence of the first input signal, means for determining an invalid first input signal, and determine a noisy first input signal, wherein each processor includes a corrector function and wherein said apparatus further comprises means for determining a status of a first input signal based on the first input signal and each other input signal. - View Dependent Claims (40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58)
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59. A method for synchronizing a plurality of processors within a computer system, each processor communicatively coupled to a respective network that is independent of each other network, said method comprising:
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generating a first input signal in a first timing source, said first timing source being external to said plurality of processors; generating a second input signal in a second timing source internal to each particular processor; transmitting said first input signal to a reference object and a correction function in each of said plurality of processors; transmitting said second input signal to said reference object and said correction function in said particular processor; transforming said first and second input signals into a transreference signal in said reference object in said particular processor; determining a timing error signal in said correction function in said particular processor; and transmitting said timing error signal to said first and second timing sources. - View Dependent Claims (60, 61)
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Specification