Data recording method, recording medium and reproduction apparatus

• US 7,111,222 B2
• Filed: 07/16/2002
• Issued: 09/19/2006
• Est. Priority Date: 07/19/2001
• Status: Expired due to Term

• Current Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Usui, Makoto, Takagi, Yuji, Yabuno, Hiroyuki
• Primary Examiner(s): CHASE, SHELLY A
• Application Number:
  US10/484,016
• Publication Number:
  US 20040257900A1
• Time in Patent Office: 1,526 Days
• Field of Search: 714/755
• US Class Current: 714/755
• CPC Class Codes: G11B 20/1803 by redundancy in data representation
• CPC Class Codes: G11B 20/1833 by adding special lists or symbols to the coded information G11B20/1806, G11B20/1866 take precedence
• CPC Class Codes: G11B 20/1866 by interleaving G11B20/1809 takes precedence
• CPC Class Codes: G11B 2020/1287 Synchronisation pattern, e.g. VCO fields
• CPC Class Codes: G11B 2220/2562 DVDs [digital versatile discs]; Digital video discs; MMCDs; HDCDs
• CPC Class Codes: H03M 13/29 combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
• CPC Class Codes: H03M 13/2954 using Picket codes or other codes providing error burst detection capabilities, e.g. burst indicator codes and long distance codes [LDC]

Abstract

A data recording method comprising the steps of encoding user data into first error correcting codes having a first correction capability, encoding control information into second error correcting codes having a second correction capability higher than the first correction capability, generating a data stream containing the first error correcting code, the second error correcting code, and synchronization signals, wherein the second error correcting codes and the synchronization signals alternatively interleave the first error correcting codes, and recording the data stream.

Claims

1. A data recording method, comprising the steps of:

encoding user data into first error correcting codes having a first correction capability;

encoding control information into second error correcting codes having a second correction capability higher than the first correction capability;

generating a data stream containing the first error correcting code, the second error correcting code, and synchronization signals, wherein the second error correcting codes and the synchronization signals alternatively interleave the first error correcting codes; and

recording the data stream.

2. A recording medium storing a data stream containing first error correcting codes obtained by encoding user data, second error correcting codes obtained by encoding control information, and synchronization signals, wherein:

the first error correcting codes have a first correction capability;

the second error correcting codes have a second correction capability higher than the first correction capability; and

in the data stream, the second error correcting codes and the synchronization signals alternatively interleave the first error correcting codes.

3. A reproduction apparatus for reproducing the data stream recorded on a recording medium according to claim 2, the apparatus comprising:

a reproduction section for generating binary data from the data stream;

a demodulation section for demodulating the binary data into the first error correcting codes and the second error correcting codes, wherein the demodulation section comprises a synchronization signal detecting section for generating a result of detection of the synchronization signal; and

an error correcting section for detecting an error in the first error correcting codes and the second error correcting codes output from the demodulation section, and correcting the error, wherein the error correcting section comprises an erasure flag generating section to the first error correcting code for generating an erasure flag for erasure correction based on a result of error correction of the second error correcting code or a result of detection of the synchronization signal, and an erasure correcting section for using the erasure flag to perform erasure correction.

4. A reproduction apparatus according to claim 3, wherein when the synchronization signal detecting section detects the synchronization signal at a time different from a predicted time, the erasure flag generating section places an erasure flag in a component symbol of the first error correcting code upstream in the data stream from the synchronization signal.

5. A reproduction apparatus claim 4, wherein the synchronization signal detecting section counts the number of clocks and reproduced bits from the time of detecting the synchronization signal and, based on the counting result, predicts a time of detection of the next synchronization signal.

6. A reproduction apparatus according to claim 3, wherein when the synchronization signal detecting section detects the synchronization signal at a time different from a predicted time, and an error is detected in a component symbol of the second error correcting code upstream in the data stream from and closest to the synchronization signal, the erasure flag generating section places an erasure flag in a component symbol of the first error correcting code upstream in the data stream from the synchronization signal.

7. A reproduction apparatus according to claim 3, wherein when the synchronization signal detecting section detects the synchronization signal at a time different from a predicted time, and an error is not detected in a component symbol of the second error correcting code upstream in the data stream from and closest to the synchronization signal, the erasure flag generating section places an erasure flag in a component symbol of the first error correcting code between the second error correcting code and the synchronization signal.

8. An error correcting circuit for use in a reproduction apparatus according to claim 3, comprising an erasure flag generating section to the first error correcting code for generating an erasure flag for erasure correction based on a result of error correction of the second error correcting code or a result of detection of the synchronization signal, and an erasure correcting section for using the erasure flag to perform erasure correction.

9. An error correcting circuit according to claim 8, wherein when the synchronization signal detecting section detects the synchronization signal at a time different from a predicted time, the erasure flag generating section places an erasure flag in a component symbol of the first error correcting code upstream in the data stream from the synchronization signal.

10. An error correcting circuit claim 9, wherein the synchronization signal detecting section counts the number of clocks and reproduced bits from the time of detecting the synchronization signal and, based on the counting result, predicts a time of detection of the next synchronization signal.

11. An error correcting circuit according to claim 8, wherein when the synchronization signal detecting section detects the synchronization signal at a time different from a predicted time, and an error is detected in a component symbol of the second error correcting code upstream in the data stream from and closest to the synchronization signal, the erasure flag generating section places an erasure flag in a component symbol of the first error correcting code upstream in the data stream from the synchronization signal.

12. An error correcting circuit according to claim 8, wherein when the synchronization signal detecting section detects the synchronization signal at a time different from a predicted time, and an error is not detected in a component symbol of the second error correcting code upstream in the data stream from and closest to the synchronization signal, the erasure flag generating section places an erasure flag in a component symbol of the first error correcting code between the second error correcting code and the synchronization signal.