Profiling program execution to identify frequently-executed portions and to assist binary translation
First Claim
1. A method, comprising:
- during a profiled interval of an execution of a program on a computer, recording profile information describing the execution, the program being coded in an instruction set in which instructions are not all of the same length, and in which the length of an instruction depends on a processor mode not expressed in the binary representation of the instruction,the recorded profile information containing information sufficient to permit, without reference to the binary representation of the program, reliable inference of the address of the last byte of a multi-byte control transfer instruction.
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Accused Products
Abstract
A method and a computer with circuitry configured for performance of the method are disclosed. During a profiled interval of an execution of a program on a computer, profile information is recorded describing the execution, without the program having been compiled for profiled execution. The program is coded in an instruction set in which an interpretation of an instruction depends on a processor mode not expressed in the binary representation of the instruction. The recorded profile information describes at least all events occurring during the profiled execution interval of the two classes: (1) a divergence of execution from sequential execution; and (2) a processor mode change that is not inferable from the opcode of the instruction that induces the processor mode change taken together with a processor mode before the mode change instruction. The profile information further identifies each distinct physical page of instruction text executed during the execution interval.
320 Citations
33 Claims
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1. A method, comprising:
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during a profiled interval of an execution of a program on a computer, recording profile information describing the execution, the program being coded in an instruction set in which instructions are not all of the same length, and in which the length of an instruction depends on a processor mode not expressed in the binary representation of the instruction, the recorded profile information containing information sufficient to permit, without reference to the binary representation of the program, reliable inference of the address of the last byte of a multi-byte control transfer instruction. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 31, 32, 33)
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19. A computer, comprising:
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an instruction pipeline configured to execute instructions of the computer, the instructions being instructions of an instruction set in which instructions are not all of the same length, and in which the length of an instruction depends on a processor mode not expressed in the binary representation of the instruction; profile circuitry configured to detect, the occurrence of profileable events occurring in the instruction pipeline, and to direct recording of profile information describing the detected profileable events, the recorded profile information containing information sufficient to permit, without reference to a binary representation of a profiled program, reliable inference of the address of the last byte of a multi-byte control transfer instruction. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30)
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Specification