Please download the dossier by clicking on the dossier button x
×

Thin channel MOSFET with source/drain stressors

  • US 7,112,848 B2
  • Filed: 09/13/2004
  • Issued: 09/26/2006
  • Est. Priority Date: 09/13/2004
  • Status: Active Grant
First Claim
Patent Images

1. A microelectronic device, comprising:

  • a silicon-on-insulator substrate having an insulating layer interposing a bulk semiconductor portion and a thin semiconductor layer;

    a pedestal having a first width defined from the thin semiconductor and insulating layers over the bulk semiconductor portion, wherein the portion of the pedestal defined from the thin semiconductor layer comprises a channel region interposing source/drain extensions;

    a gate electrode having a second width and located over the pedestal, wherein the second width is different than the first width; and

    source/drain stressors located over the bulk semiconductor portion and each contacting a corresponding one of the source/drain extensions, wherein at least one of the source/drain stressors is thicker than the channel region.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×