×

Testing arrangement to distribute integrated circuits

  • US 7,112,979 B2
  • Filed: 10/23/2002
  • Issued: 09/26/2006
  • Est. Priority Date: 10/23/2002
  • Status: Expired due to Fees
First Claim
Patent Images

1. A method comprising:

  • testing an integrated circuit (IC) at a first voltage level step;

    in response to a positive test result associating the IC with the first voltage level step; and

    in response to a negative test result, resting the IC at a second voltage level step, the negative test result indicating the IC failed to operate within a power specification associated wit the first voltage level step at each of a plurality of predetermined frequencies.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×