Communication driver
First Claim
1. A communication circuit, comprising:
- a decoder configured to receive input signals and to provide T decoded signals;
a transmit section, wherein the transmit section comprises;
T sets of transmit circuits arranged in parallel,wherein each of the T sets of transmit circuits is configured to receive a respective one of the T decoded signals,wherein each of the T sets of transmit circuits comprises a digital-to-analog converter (DAC) and is configured to provide a transmit output signal,wherein each DAC comprises;
N current sources arranged in parallel and in a differential configuration,
wherein each of the N current sources includes a respective control input, and
wherein the transmit output signal provided by the DAC comprises a sum of outputs of the N current sources; and
M delay elements,
wherein an input of a first one of the M delay elements and the control input of a first one of the N current sources are configured to receive the respective one of the T decoded signals,
wherein an mth one of the M delay elements includes an input in communication with an output of an m−
1th one of the M delay elements,
wherein the output of one of the M delay elements controls a corresponding control input of one of the N current sources,wherein a sum of the transmit output signals from the T sets of transmit circuits forms an accumulated output signal,wherein each of the T sets of transmit circuits comprises a replica circuit and is configured to provide a replica output signal,wherein each replica circuit comprises;
N replica current sources arranged in parallel and in a differential configuration,
wherein each of the N replica current sources includes a respective control input,
wherein the control input of a first one of the N replica current sources is configured to receive the respective one of the T decoded signals,
wherein the output of the one of the M delay elements controls a corresponding control input of one of the N replica current sources,
wherein the replica output signal comprises a sum of outputs of the N replica current sources, andwherein a sum of the replica output signals from the T sets of transmit circuits forms an accumulated replica output signal; and
a receive section,wherein the receive section is configured to receive a composite signal and the accumulated replica output signal, andwherein the receive section comprises;
a summer,wherein the summer is configured to sum the composite signal and the accumulated replica output signal.
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Abstract
An Ethernet controller includes a decoder, and T sets of transmit circuits. Each set of transmit circuits receives one of T decoded signals from the decoder, and includes a digital-to-analog converter (DAC) that provides a transmit output signal, and a replica circuit that provides a replica output signal. Each DAC includes N current sources arranged in parallel and differentially, and M delay elements. Each current source includes a control input. A sum of outputs of the N current sources forms each transmit output signal. An input of the first delay element and the control input of the first current source receive a decoded signal. An input of an mth delay element is in communication with an output of an m−1th delay element. The output of each delay element controls a corresponding control input of a current source. A sum of the transmit output signals forms an accumulated output signal.
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Citations
27 Claims
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1. A communication circuit, comprising:
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a decoder configured to receive input signals and to provide T decoded signals; a transmit section, wherein the transmit section comprises; T sets of transmit circuits arranged in parallel, wherein each of the T sets of transmit circuits is configured to receive a respective one of the T decoded signals, wherein each of the T sets of transmit circuits comprises a digital-to-analog converter (DAC) and is configured to provide a transmit output signal, wherein each DAC comprises; N current sources arranged in parallel and in a differential configuration,
wherein each of the N current sources includes a respective control input, and
wherein the transmit output signal provided by the DAC comprises a sum of outputs of the N current sources; andM delay elements,
wherein an input of a first one of the M delay elements and the control input of a first one of the N current sources are configured to receive the respective one of the T decoded signals,
wherein an mth one of the M delay elements includes an input in communication with an output of an m−
1th one of the M delay elements,
wherein the output of one of the M delay elements controls a corresponding control input of one of the N current sources,wherein a sum of the transmit output signals from the T sets of transmit circuits forms an accumulated output signal, wherein each of the T sets of transmit circuits comprises a replica circuit and is configured to provide a replica output signal, wherein each replica circuit comprises; N replica current sources arranged in parallel and in a differential configuration,
wherein each of the N replica current sources includes a respective control input,
wherein the control input of a first one of the N replica current sources is configured to receive the respective one of the T decoded signals,
wherein the output of the one of the M delay elements controls a corresponding control input of one of the N replica current sources,
wherein the replica output signal comprises a sum of outputs of the N replica current sources, andwherein a sum of the replica output signals from the T sets of transmit circuits forms an accumulated replica output signal; and a receive section, wherein the receive section is configured to receive a composite signal and the accumulated replica output signal, and wherein the receive section comprises; a summer, wherein the summer is configured to sum the composite signal and the accumulated replica output signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A communication system, comprising:
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means for decoding input signals to provide T decoded signals; means for transmitting signals, wherein the signal transmitting means comprises; T sets of means for generating a signal arranged in parallel, wherein each of the T sets of signal generating means is configured to receive a respective one of the T decoded signals, wherein each of the T sets of signal generating means comprises a means for converting digital signals to analog signals and is configured to provide a transmit output signal, wherein each signal converting means comprises; N means for generating current arranged in parallel and in a differential configuration,
wherein each of the N current generating means includes a respective control input, and
wherein the transmit output signal provided by the signal converting means comprises a sum of outputs of the N current generating means; andM means for delaying signals,
wherein an input of a first one of the M signal delaying means and the control input of a first one of the N current generating means are configured to receive the respective one of the T decoded signals,
wherein an mth one of the M signal delaying means includes an input in communication with an output of an m−
1th one of the M signal delaying means,
wherein the output of one of the M signal delaying means controls a corresponding control input of one of the N current generating means,wherein a sum of the transmit output signals from the T sets of signal generating means forms an accumulated output signal, wherein each of the T sets of signal generating means comprises a means for generating a replica output signal, wherein each replica output signal generating means comprises; N means for generating a replica current arranged in parallel and in a differential configuration,
wherein each of the N replica current generating means includes a respective control input,
wherein the control input of a first one of the N replica current generating means is configured to receive the respective one of the T decoded signals, and
wherein the output of the one of the M signal delaying means controls a corresponding control input of one of the N replica current generating means,
wherein the replica output signal comprises a sum of outputs of the N replica current generating means, andwherein a sum of the replica output signals from the T sets of signal generating means forms an accumulated replica output signal; and means for receiving signals, wherein the signal receiving means is configured to receive a composite signal and the accumulated replica output signal, and wherein the signal receiving means comprises; means for summing, wherein the summing means is responsive to the composite signal and the accumulated replica output signal. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A method of communicating signals, comprising the steps of:
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a.) decoding T input signals to provide T decoded signals; b.) transmitting signals, wherein step (b) comprises the steps of; b1.) differentially providing T transmit output signals in accordance with the T decoded signals, wherein for each transmit output signal, step (b1) comprises the steps of; 1.) supplying N sources of current; 2.) controlling the supply of current from each of the N sources of current; 3.) delaying current from M of the N sources of current,
wherein an input of a first one of the M delaying steps and a control input of a first one of the N sources of current receive a respective one of the T decoded signals,
wherein an input of the mth one of the M delaying steps receives a signal from an m−
1th one of the M delaying steps, and
wherein an output of one of the M delaying steps controls a corresponding one of the N sources of current; and4.) summing the delayed currents; b2.) differentially providing T replica output signals in accordance with the T decoded signals, wherein for each replica output signal, step (b2) comprises the steps of; 1.) supplying N sources of replica current; 2.) controlling the supply of current from each of the N sources of replica current,
wherein a control input of a first one of the N sources of replica current receives the respective one of the T decoded signals,
wherein the output of the one of the M delaying steps controls a corresponding one of the N sources of replica current, and3.) summing outputs of the N sources of replica current; b3.) summing the T transmit output signals to generate an accumulated output signal; b4.) summing the T replica output signals to generate an accumulated replica output signal; c.) receiving a composite signal and the accumulated replica output signal; and d.) summing the composite signal and the accumulated replica output signal. - View Dependent Claims (22, 23, 24, 25, 26, 27)
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Specification