Dual loop automatic gain control

• US 7,116,955 B2
• Filed: 09/24/2002
• Issued: 10/03/2006
• Est. Priority Date: 09/24/2002
• Status: Expired due to Fees

• Current Assignee: Broadcom Corporation (Broadcom, Inc.)
• Original Assignee: ATI Technologies Incorporated (Advanced Micro Devices, Inc.)
• Inventors: Schaffer, Troy A., Shah, Anand M., Hulyalkar, Samir N.
• Primary Examiner(s): Vo, Nguyen T.
• Assistant Examiner(s): CHOW, CHARLES CHIANG
• Application Number:
  US10/253,245
• Publication Number:
  US 20040063413A1
• Time in Patent Office: 1,470 Days
• Field of Search: 455/234.1, 4552391-2501, 455/253.1, 455/253.2, 455/311, 455/341, 455/344, 455/232.1, 455/236.1, 455/136, 455/138, 455/425, 455/426, 455/424, 455/456.5, 455/456.6, 455/550.1, 455/575.1, 455/561, 455/127.2, 455/135, 330/133, 330/75, 330/103, 330/254, 330/278, 330/289, 330/134, 330/132, 375/345, 375/297, 375/141, 375/146, 375/346, 375/240.07, 375/233, 375/136, 375/147, 370/463, 370/501, 370/320, 370/342, 348/729, 348/707, 324/76, 324/35
• US Class Current: 455/234.1
• CPC Class Codes: H03G 3/3068 Circuits generating control signals for both R.F. and I.F. stages
• CPC Class Codes: H04B 1/109 by improving strong signal performance of the receiver when strong unwanted signals are present at the receiver input

Abstract

An AGC circuit includes both wide-band and narrow-band VGAs. Two power monitors monitor the power level of the two VGAs. Based upon the signals provided by the power monitors, the AGC circuit derives two error terms. The AGC circuit filters and combines the error terms to determine a desired adjustment to the total gain and a desired adjustment to the distribution of the gain between the wide-band VGA and the narrow-band VGA. The AGC circuit also minimizes the noise figure of the narrow-band VGA subject to linearity constraints.

Claims

1. An automatic gain control (AGC) circuit comprising:

an AGC loop including a first variable gain amplifier (VGA) and a second VGA; and

control circuitry for controlling respective amounts of gain applied by the first and second VGAs, the control circuitry comprising;

a first power monitor circuit, coupled to the first VGA for providing a first power level signal representing an average power level of an output signal of the first VGA;

a second power monitor circuit, coupled to the second VGA for providing a second power level signal representing an average power level of an output signal of the second VGA;

difference circuitry which generates first and second error signals representing respective differences between the first and second power level signals and first and second target signals, representing desired power levels for the output signals of the first and second VGAs respectively, and

a combining circuit, responsive to the first and second error signals, which adjusts a total gain to be applied by the first and second VGAs and which determines a portion of the total gain to be applied by the first VGA and a portion of the total gain to be applied by the second VGA and distributes the total gain between the first and second VGAs in accordance with the determination;

wherein the control circuitry is responsive to an output signal of the AGC circuit to transfer gain from the second VGA to the first VGA to reduce a noise figure of the AGC circuit while maintaining the total gain.

2. An AGC circuit according to claim 1, wherein the control circuitry further includes:

filtering circuitry, coupled to receive the first and second error signals for generating first and second gain control signals;

at least one scaling circuit, coupled to receive at least one of the first and second gain control signals for adjusting the at least one of the first and second gain control signals to produce first and second scaled gain control signals;

wherein the first and second scaled gain control signals are used to control the gains of the respective first and second VGAs and, for substantially equal changes in the first and second gain control signals, the first and second scaled gain control signals produce substantially equal changes in gain in the respective first and second VGAs.

3. An AGC circuit according ta claim 1, wherein the combining circuit determines if the gain of the second VGA can be adjusted and adjusts the gain of the second VGA to adjust the total gain if the gain of the second VGA can be adjusted and, wherein the first combining circuit adjusts the gain of the first VGA to adjust the total gain if the gain of the second VGA can not be adjusted.

4. An AGC circuit according to claim 3, wherein the combining circuit changes the gain of the second VGA by a predetermined amount in a first sense and changes the gain of the first VGA by an amount substantially equal to the predetermined amount in a sense opposite to the first sense.

5. An AGC circuit according to claim 1, wherein the first and second VGAs are analog amplifiers and the control circuitry further comprises:

an analog-to-digital converter (ADC) coupled to receive output signals provided by the second VGA for providing digital amplitude values;

digital conversion circuitry, coupled to the ADC for receiving the digital amplitude values, which converts the digital amplitude signals into digital logarithmic amplitude values; and

wherein the difference circuitry compares the digital logarithmic amplitude values to a target logarithmic amplitude value to calculate the second error signal; and

a loop filter which processes the respective difference values to provide input signals to the first and second combining circuits.

6. An AGC circuit according to claim 5, wherein the digital conversion circuitry includes:

en encoder circuit, responsive to a bit-position of a most significant non-zero bit of a digital amplitude value for translating the bit position into an integer part of a respective one of the digital logarithmic amplitude values; and

a multiplexer circuit, responsive to the bit position of the most significant non-zero bit of the digital amplitude value for copying bits in the digital amplitude value occupying less significant bit positions than the most significant bit position to form a fractional part of the respective one of the digital logarithmic amplitude values.

7. An automatic gain control (AGC) circuit according to claim 1, wherein:

at least one of the first VGA and the second VGA is a digital VGA, which operates according to the equation;

OUT=e ^KIN+V₀

where “

KIN”

is the input signal to the digital VGA, IN, multiplied by a constant, “

k”

, “

V₀”

is an amplifier offset voltage, “

e”

is the natural logarithm base and “

OUT”

is the output signal of the digital VGA;

wherein the digital VGA includes a decoder that translates an integer part of the signal KIN into a most-significant non-zero bit position in the signal OUT, and a demultiplexer that copies p bits of a fractional part of the signal KIN as p bits in the signal OUT that are less significant than the most-significant non-zero bit position.

8. An automatic gain control (AGC) circuit comprising:

a first variable gain amplifier (VGA), which amplifies a first signal occurring at a first point in the AGC circuit by an amount determined by a first gain control signal to produce a first amplified signal;

a first power monitor, coupled to receive the first amplified signals for providing a first power signal, representing a measure of signal power for the first amplified signal;

a second VGA, which amplifies a second signal occurring at a second point in the AGC circuit by an amount determined by a second gain control signal to provide a second amplified signal, wherein the second point in the circuit is distinct from the first point in the circuit and second signal has been amplified by the first VGA;

a second power monitor, coupled to receive the second amplified signals for providing a second power signal, representing a measure of signal power for the second amplified signal;

difference circuitry coupled to receive the first and second power signals and respective first and second target signals and which generates first and second error signals representing respective differences between the first and second power signals and the first and second target signals; and

control circuitry, coupled to the first and second power monitors for receiving the first and second error signals and coupled to the first and second VGAs for providing the first and second gain control signals, the control circuitry including;

combining circuitry, responsive to the first and second error signals for determining a total gain to be applied by the first and second VGAs, for determining a portion of the total gain to be applied by the first VGA and a portion of the total gain to be applied by the second VGA and for generating the first and second gain control signals.

9. An automatic gain control (AGC) method for use in a AGC circuit that includes an AGC loop including a first variable gain amplifier (VGA) having an input signal and an output signal which is a function of the input signal and a first adjustable gain and a second VGA having an input signal and an output signal which is a function of the input signal of the second VGA and a second adjustable gain, the method comprising the steps of:

monitoring the output signal of the first VGA to provide a first power level signal;

monitoring the output signal of the second VGA to provide a second power level signal;

generating first and second error sianals, representing respective differences between the first and second power level signals and first and second target signals;

responsive to the first and second error sianals, determining an amount by which a sum of the first adjustable gain and the second adjustable gain are to be adjusted as a total gain adjustment; and

responsive to the output signal of the second VGA, dividing the determined total gain adjustment between the first VGA and the second VGA to minimize the gain of the second VGA while maintaining the determined total gain adjustment, to reduce a noise figure of the output signal of the second VGA.

10. An AGC method according to claim 9 further including the steps of:

filtering the first and second error signals to generate first and second gain control signals;

scaling at least one of the first and second gain control signals to adjust the at least one of the first and second gain control signals to produce first and second scaled gain control signals; and

controlling the gains of the first and second VGAs using the first and second scaled gain control signals, wherein, for substantially equal changes in the first and second gain control signals, the first and second scaled gain control signals produce substantially equal changes in gain in the respective first and second VGAs.

11. An AGC method according to claim 9, wherein the step of dividing the determined gain adjustment between first VGA and the second VGA includes the steps of:

determining if the gain of the second VGA can be adjusted and adjusting the gain of the second VGA to the total gain adjustment if the gain of the second VGA can be adjusted; and

adjusting the gain of the first VGA to the total gain adjustment if the gain of the second VGA can not be adjusted.

12. An AGC method according to claim 11, wherein the step of dividing the total gain adjustment between the first and second VGAs includes the step of changing the gain of the second VGA by a predetermined amount in a first sense and changing the gain of the first VGA by an amount substantially equal to the predetermined amount in a second sense, opposite to the first sense.

13. An AGC method according to claim 9, wherein the first and second VGAs are analog amplifiers and the method further comprises the steps of:

digitizing output signals provided by the second VGA to provide digital amplitude values;

converting the digital amplitude values into digital logarithmic amplitude values;

comparing the digital logarithmic amplitude values to a target logarithmic amplitude value to calculate respective difference values between the target value and the respective digital logarithmic amplitude values to generate the second error signal; and

filtering the second error signal to determine the total gain adjustment.

14. An AGC method according to claim 13, wherein the step of converting the digital amplitude values into digital logarithmic amplitude values includes the steps of;

determining a bit-position of a most significant non-zero bit of a digital amplitude value;

translating the determined bit position into an integer part of a respective one of the digital logarithmic amplitude values; and

copying bits in the digital amplitude value occupying less significant bit positions than the most significant bit position to form a fractional part of the respective one of the digital logarithmic amplitude values.

15. A computer readable carrier including computer program instructions that cause a computer to implement an automatic gain control (AGC) method for use in a AGC circuit that includes an AGC loop including a first variable gain amplifier (VGA) having an input signal and an output signal which is a function of the input signal and a first adjustable gain and a second VGA having an input signal and an output signal which is a function of the input signal of the second VGA and a second adjustable gain, the method comprising the steps of:

monitoring the output signal of the first VGA to provide a first power level signal;

monitoring the output signal of the second VGA to provide a second power level signal;

generating first and second error signals, representing respective differences between the first and second power level signals and first and second target signals;

responsive to the first and second error sianals, determining an amount by which a sum of the first adjustable gain and the second adjustable gain are to be adjusted as a total gain adjustment; and

dividing the determined total gain adjustment between the first VGA and the second VGA to minimize the gain of the second VGA.

16. A computer readable carrier according to claim 15, wherein the computer program instructions further cause the computer to implement the steps of:

filtering the first and second error signals to generate first and second gain control signals;

scaling at least one of the first and second gain control signals to adjust the at least one of the first and second gain control signals to produce first and second scaled gain control signals; and

controlling the gains at the first and second VGAs using the first and second scaled gain control signals, wherein, for substantially equal changes in the first and second gain control signals, the first and second scaled gain control signals produce substantially equal changes in gain in the respective first and second VGAs.