Method of generating multiple oxides by plasma nitridation on oxide

• US 7,118,974 B2
• Filed: 04/26/2004
• Issued: 10/10/2006
• Est. Priority Date: 07/30/2002
• Status: Expired due to Fees

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Chen, Chia-Lin, Chen, Chien-Hao, Yu, Mo-Chiun
• Primary Examiner(s): Booth, Richard A.
• Application Number:
  US10/831,871
• Publication Number:
  US 20040198000A1
• Time in Patent Office: 897 Days
• Field of Search: 438/287, 438/785, 438/981, 438/763
• US Class Current: 438/287
• CPC Class Codes: H01L 21/02238 silicon in uncombined form, i.e. pure silicon
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/31662 of silicon in uncombined form
• CPC Class Codes: H01L 21/32 using masks
• CPC Class Codes: H01L 21/823462 with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
• CPC Class Codes: H01L 21/823481 isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
• CPC Class Codes: H01L 21/823857 with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
• CPC Class Codes: H01L 21/823878 isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
• CPC Class Codes: Y10S 438/981 Utilizing varying dielectric thickness

Abstract

A method of forming multiple gate oxide thicknesses on active areas that are separated by STI isolation regions on a substrate. A first layer of oxide is grown to a thickness of about 50 Angstroms and selected regions are then removed. A second layer of oxide is grown that is thinner than first growth oxide. For three different gate oxide thicknesses, selected second oxide growth regions are nitridated with a N₂ plasma which increases the dielectric constant of a gate oxide and reduces the effective oxide thickness. To achieve four different gate oxide thicknesses, nitridation is performed on selected first growth oxides and on selected second growth oxide regions. Nitridation of gate oxides also prevents impurity dopants from migrating across the gate oxide layer and reduces leakage of standby current. The method also reduces corner loss of STI regions caused by HF etchant.

Claims

1. A method of forming three different gate oxide thicknesses on a substrate comprising:

(a) providing a substrate with isolation regions that separate active areas where circuits are to be formed, with one said active area having a nitrogen implant near the substrate surface,

(b) growing a first oxide layer on active areas of said substrate,

(c) removing selected portions of the first oxide layer including the oxide over the nitridated active area,

(d) growing a second oxide layer on active areas of said substrate,

(e) annealing said substrate,

(f) nitridating all oxide regions, and

(g) annealing said substrate;

wherein the first oxide layer is comprised of an HfO₂/silicate layer which is formed by first growing an SiO₂ layer with a thickness of about 3 Angstroms using an RTO method followed by depositing an HfO₂/silicate later with a thickness in a range of 2 to 30 Angstroms.

3. The method of claim 1 wherein a second oxide layer is grown by an RTO method at a temperature of 650°

C. to give a thickness of about 10 Angstroms on active areas with a nitrogen implant and a thickness of about 15 Angstroms on active areas with no nitrogen implant.

4. The method of claim 1 wherein annealing steps are accomplished in a chamber containing N₂ flowing at a rate of between 5 and 10 slm and He flowing at a rate of between about 5 and 10 slm while the surface of said substrate is heated to a temperature of between about 900°

C. and 1200°

C. and a chamber pressure of between about 10 and 100 Torr for a period of 30 to 120 seconds.

5. The method of claim 1 wherein the nitridation is performed by placing said substrate in a chamber with an N₂ flow rate of 100 sccm, a pressure of 1.5 Torr, and a power of 300 Watts for a period of 30 to 300 seconds at a temperature less than 100°

C. and preferably 25°

C.

2. A method of forming three different gate oxide thicknesses on a substrate comprising:

(a) providing a substrate with isolation regions that separate active areas where circuits are to be formed, with one said active area having a nitrogen implant near the substrate surface,

(b) growing a first oxide layer on active areas of said substrate,

(c) removing selected portions of the first oxide layer including the oxide over the nitridated active area,

(d) growing a second oxide layer on active areas of said substrate,

(e) annealing said substrate,

(f) nitridating all oxide regions, and

(g) annealing said substrate;

wherein the first oxide layer is comprised of an HfO₂/silicate layer and wherein selected portions of the HfO₂/silicate layer are removed by patterning a photoresist on said substrate and then etching exposed HfO₂/silicate layer with a dilute HF solution.

7. The method of claim 2 wherein a second oxide layer is grown by an RTO method at a temperature of 650°

C. to give a thickness of about 10 Angstroms on active areas with a nitrogen implant and a thickness of about 15 Angstroms on active areas with no nitrogen implant.

8. The method of claim 2 wherein annealing steps are accomplished in a chamber containing N₂ flowing at a rate of between 5 and 10 slm and He flowing at a rate of between about 5 and 10 slm while the surface of said substrate is heated to a temperature of between about 900°

C. and 1200°

C. and a chamber pressure of between about 10 and 100 Torr for a period of 30 to 120 seconds.

9. The method of claim 2 wherein the nitridation is performed by placing said substrate in a chamber with an N₂ flow rate of 100 sccm, a pressure of 1.5 Torr, and a power of 300 Watts for a period of 30 to 300 seconds at a temperature less than 100°

C. and preferably 25°

C.

6. A method of forming three different gate oxide thicknesses on a substrate comprising:

(a) providing a substrate with isolation regions that separate active areas where circuits are to be formed, with one said active area having a nitrogen implant near the substrate surface,

(b) growing a first oxide layer on active areas of said substrate,

(c) removing selected portions of the first oxide layer including the oxide over the nitridated active area,

(d) growing a second oxide layer on active areas of said substrate,

(e) annealing said substrate,

(f) nitridating all oxide regions, and

(g) annealing said substrate;

wherein the first layer is comprised of an HfO₂/silicate layer and wherein the HfO₂/silicate layer is used to make a integrated circuit with DRAM functionality, a thicker SiO₂ gate oxide is used to make a MOSFET which is part of a low power logic circuit, and a thinner SiO₂ gate oxide used to make a MOSFET as part of a high performance logic circuit.

10. The method of claim 6 wherein a second oxide layer is grown by an RTO method at a temperature of 650°

C. to give a thickness of about 10 Angstroms on active areas with a nitrogen implant and a thickness of about 15 Angstroms on active areas with no nitrogen implant.

11. The method of claim 6 wherein annealing steps are accomplished in a chamber containing N₂ flowing at a rate of between 5 and 10 slm and He flowing at a rate of between about 5 and 10 slm while the surface of said substrate is heated to a temperature of between about 900°

C. and 1200°

C. and a chamber pressure of between about 10 and 100 Torr for a period of 30 to 120 seconds.

12. The method of claim 6 wherein the nitridation is performed by placing said substrate in a chamber with an N₂ flow rate of 100 sccm, a pressure of 1.5 Torr, and a power of 300 Watts for a period of 30 to 300 seconds at a temperature less than 100°

C. and preferably 25°

C.