STI formation in semiconductor device including SOI and bulk silicon regions
First Claim
1. A method for forming a silicon trench isolation (STI) in a device including a silicon-on-insulator (SOI) region and a bulk silicon region, the method comprising:
- etching to an uppermost silicon layer using an STI mask;
conducting a timed etch that etches to a desired depth in the bulk silicon region and stops on a buried insulator of the SOI region;
etching through the buried insulator of the SOI region; and
depositing an STI material to form the STI.
3 Assignments
0 Petitions
Accused Products
Abstract
Methods for forming or etching silicon trench isolation (STI) in a silicon-on-insulator (SOI) region and a bulk silicon region, and a semiconductor device so formed, are disclosed. The STI can be etched simultaneously in the SOI and bulk silicon regions by etching to an uppermost silicon layer using an STI mask, conducting a timed etch that etches to a desired depth in the bulk silicon region and stops on a buried insulator of the SOI region, and etching through the buried insulator of the SOI region. The buried insulator etch for this process can be done with little complexity as part of a hardmask removal step. Further, by choosing the same depth for both the bulk and SOI regions, problems with a subsequent CMP process are avoided. The invention also cleans up the boundary between the SOI and bulk regions where silicon nitride residuals may exist.
-
Citations
26 Claims
-
1. A method for forming a silicon trench isolation (STI) in a device including a silicon-on-insulator (SOI) region and a bulk silicon region, the method comprising:
-
etching to an uppermost silicon layer using an STI mask; conducting a timed etch that etches to a desired depth in the bulk silicon region and stops on a buried insulator of the SOI region; etching through the buried insulator of the SOI region; and depositing an STI material to form the STI. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
-
11. A method for etching a silicon trench isolation (STI) in a mixed silicon-on-insulator (SOI) region and a bulk silicon region device, the method comprising:
-
etching to an uppermost silicon layer using an STI mask; conducting a timed etch that etches to a desired depth in the bulk silicon region and stops on a buried insulator of the SOI region; and etching Through the buried insulator of the SOI region. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
-
-
22. A method for forming a silicon trench isolation (STI) in a device including a silicon-on-insulator (SOI) region and a bulk silicon region, the method comprising:
-
providing an STI mask; and simultaneously forming the STI in the SOI region and the bulk silicon region, wherein the forming step includes; etching to an uppermost silicon layer using the STI mask; conducting a timed etch that etches to a desired depth in the bulk silicon region and stops on a buried insulator of the SOI region; etching through the buried insulator of the SOI region; and depositing an STI material to form the STI. - View Dependent Claims (23, 24, 25, 26)
-
Specification