×

Low power RC clocking system for wireless communications

  • US 7,120,190 B2
  • Filed: 07/19/2002
  • Issued: 10/10/2006
  • Est. Priority Date: 07/19/2002
  • Status: Active Grant
First Claim
Patent Images

1. A method for reducing power consumption of a radio receiver in a frequency hopping communications system that operates according to a hop sequence comprised of a set of channels corresponding to discrete radio frequencies to which the radio receiver is sequentially tuned, the method comprising the steps of:

  • (a) entering a sleep mode, during which at least some receiver digital circuits are clocked with a low-frequency clock source;

    (b) awakening from the sleep mode, such that said at least some receiver digital circuits are clocked with a high-frequency clock source;

    (c) determining an expected channel in the hop sequence upon which communications are expected to be received;

    (d) deriving a target channel in the hop sequence based upon the expected channel according to a channel mapping, wherein the channel mapping defines a correspondence between the expected channel and the target channel;

    (e) tuning the radio receiver to the target channel;

    (f) determining whether a communications signal is detected on the target channel;

    (g) repeating steps (c), (d), (e) and (f) for another expected channel in the hop sequence if the communications signal is not detected.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×