Method of making an electronic module

• US 7,120,992 B2
• Filed: 06/27/2003
• Issued: 10/17/2006
• Est. Priority Date: 06/28/2002
• Status: Active Grant

• Current Assignee: Boston Scientific Neuromodulation Corporation (Boston Scientific Corporation)
• Original Assignee: Advanced Bionics Corporation (Sonova Holding AG)
• Inventors: Marnfeldt, Goran N., Haller, Matthew I., Parramon, Jordi, He, Tom Xiaohai
• Primary Examiner(s): Kim, Paul D.
• Application Number:
  US10/609,452
• Publication Number:
  US 20050057905A1
• Time in Patent Office: 1,208 Days
• Field of Search: 295/921, 296/05, 29830-832, 298/46, 298/54, 174/52.1, 174/255, 174/260, 174/261, 607 1- 3, 607 46- 52, 607 59- 61, 600/302, 600/554, 600/377, 127/877
• US Class Current: 29/606
• CPC Class Codes: A61N 1/36007 of urogenital or gastrointestinal organs, e.g. for incontinence control
• CPC Class Codes: A61N 1/3605 Implantable neurostimulators for stimulating central or peripheral nerve system
• CPC Class Codes: A61N 1/37205 Microstimulators, e.g. implantable through a cannula
• CPC Class Codes: A61N 1/37217 characterised by the communication link, e.g. acoustic or tactile
• CPC Class Codes: A61N 1/37223 Circuits for electromagnetic coupling
• CPC Class Codes: A61N 1/37229 Shape or location of the implanted or external antenna
• CPC Class Codes: A61N 1/37235 Aspects of the external programmer
• CPC Class Codes: A61N 1/3727 characterised by the modulation technique
• CPC Class Codes: A61N 1/37276 characterised by means for reducing power consumption during telemetry
• CPC Class Codes: A61N 1/375 Constructional arrangements, e.g. casings
• CPC Class Codes: A61N 1/37512 Pacemakers
• CPC Class Codes: A61N 1/3787 from an external energy source
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/45147 Copper (Cu) as principal constituent
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00011 Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/1461 : MEMS
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/30111 : matching
• CPC Class Codes: H02J 2310/23 : The load being a medical device, a medical implant, or a life supporting device
• CPC Class Codes: H02J 50/10 : using inductive coupling
• CPC Class Codes: H02J 7/345 : using capacitors as storage or buffering devices
• CPC Class Codes: H04B 5/26 : using coils
• CPC Class Codes: H04B 5/79 : for data transfer in combination with power transfer
• CPC Class Codes: H04L 27/02 : Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation H04L27/32 takes precedence
• CPC Class Codes: H04L 27/10 : Frequency-modulated carrier systems, i.e. using frequency-shift keying H04L27/32 takes precedence
• CPC Class Codes: Y10T 29/4902 : Electromagnet, transformer or inductor
• CPC Class Codes: Y10T 29/49071 : by winding or coiling
• CPC Class Codes: Y10T 29/49073 : by assembling coil and core
• CPC Class Codes: Y10T 29/49128 : Assembling formed circuit to base
• CPC Class Codes: Y10T 29/4913 : Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/49155 : Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/49169 : Assembling electrical component directly to terminal or elongated conductor
• CPC Class Codes: Y10T 29/49826 : Assembling or joining
• CPC Class Codes: Y10T 29/49945 : by driven force fit
• CPC Class Codes: Y10T 29/49968 : Metal fusion joining
• CPC Class Codes: Y10T 428/12264 : having outward flange, gripping means or interlocking feature
• CPC Class Codes: Y10T 428/12271 : having discrete fastener, marginal fastening, taper, or end structure
• CPC Class Codes: Y10T 428/12347 : Plural layers discontinuously bonded [e.g., spot-weld, mechanical fastener, etc.]
• CPC Class Codes: Y10T 428/12375 : having member which crosses the plane of another member [e.g., T or X cross section, etc.]
• CPC Class Codes: Y10T 428/12396 : Discontinuous surface component
• CPC Class Codes: Y10T 428/12535 : with additional, spatially distinct nonmetal component
• CPC Class Codes: Y10T 428/12806 : Refractory [Group IVB, VB, or VIB] metal-base component

Abstract

Compact electronic modules, which may be used with implantable microstimulators and other medical and non-medical devices, and manufacture/assembly of such modules are described. Component and circuitry designs utilize unique redistribution techniques and attachment methods. A number of component designs and packaging configurations maximize the volume efficiency of electronic modules. Also included are improved processes and systems enabling the manufacture and assembly of such compact packages.

Claims

1. A method of making an electronic module, comprising:

providing an integrated circuit, wherein the integrated circuit comprises a top face and a bottom face;

creating a first layer of insulation on at least some portions of the top face of the integrated circuit;

creating a redistributed surface on the top face of the integrated circuit, including;

creating a redistribution layer comprising at least a layer of conductive redistribution material above at least some portions of the top face of the integrated circuit, which redistribution layer is electrically connected to the integrated circuit and includes conductive traces, mounting pads, and interconnect pads;

using at least some of the traces to position at least some of the interconnect pads along at least one edge of the redistributed surface;

creating a layer of insulation above at least some portions of the redistribution layer;

mounting at least one secondary component to at least one mounting pad;

securing the integrated circuit to a substrate, which substrate includes electrical traces, wherein at least one trace terminates along at least one edge of the substrate; and

electrically connecting at least one interconnect pad along at least one edge of the redistributed surface and at least one trace along at least one edge of the substrate, thereby electrically connecting the substrate to the integrated circuit,

wherein creating the redistribution layer comprises;

creating a first layer of bond material on at least some portions of the top face of the integrated circuit;

creating a layer of conductive redistribution material on at least some portions of the first bond layer; and

creating a second layer of bond material on at least some portions of the redistribution material.

2. The method of claim 1 further comprising electrically connecting additional components to at least the top face of the integrated circuit to form an electronics package of a microstimulator.

3. The method of claim 1 further comprising

providing a core comprising two separate halves;

securing one core half to the redistributed surface of the integrated circuit;

securing one core half to a portion of the substrate; and

winding a wire around the core halves to create a coil assembly.

4. The method of claim 3 wherein the core, when the two halves are assembled, is a dumbbell shape.

5. The method of claim 1 wherein the at least one secondary component is at least one of a diode, a capacitor, a power source, and a coil.

6. The method of claim 1 wherein the first bond layer covers portions of the top face of the integrated circuit and portions of the first insulation layer, and wherein the conductive redistribution material covers the first bond layer, and wherein the second bond layer covers the redistribution material.

7. The method of claim 1 wherein the redistributed surface comprises at least one of copper, polyimide, gold, and titanium tungsten.

8. The method of claim 1 further comprising:

creating a grounding layer competing at least a layer of shielding material above at least some portions of the integrated circuit.

9. The method of claim 8 wherein creating a grounding layer comprises:

creating a first layer of grounding bond material on at least some portions of the integrated circuit;

creating a layer of shielding material on at least some portions of the first grounding bond layer; and

creating a second layer of grounding bond material on at least some portions of the shielding material.

10. The method of claim 9 wherein the first layer of grounding bond material covers portions of the top face of the integrated circuit and portions of the first insulation layer, and wherein the layer of shielding material covers the first grounding bond layer, and wherein the second grounding bond layer covers the layer of shielding material.

11. The method of claim 1 wherein at least a portion of the post-processing is performed on a wafer containing multiple integrated circuits.