MEMS pressure sensing device

• US 7,121,146 B1
• Filed: 10/29/2004
• Issued: 10/17/2006
• Est. Priority Date: 10/29/2004
• Status: Active Grant

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Hopper, Peter J., Drury, Robert, Mian, Michael, McGinty, Jim
• Primary Examiner(s): Lefkowitz, Edward
• Assistant Examiner(s): ALLEN, ANDRE J
• Application Number:
  US10/976,449
• Time in Patent Office: 718 Days
• Field of Search: 737/24, 737/18, 737/54, 438/53, 361/283.1, 257/678
• US Class Current: 73/724
• CPC Class Codes: B81B 2201/0264 Pressure sensors
• CPC Class Codes: B81B 2207/015 the micromechanical device and the control or processing electronics being integrated on the same substrate
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: B81C 2201/019 Bonding or gluing multiple substrate layers
• CPC Class Codes: B81C 2203/0735 Post-CMOS, i.e. forming the micromechanical structure after the CMOS circuit
• CPC Class Codes: G01L 9/0073 using a semiconductive diaphragm

Abstract

A pressure sensing system formed in a monolithic semiconductor substrate. The pressure sensing system comprises a pressure sensing device formed on the monolithic semiconductor substrate. Pressure sensing device is adapted to be disposed in an environment for developing an electrical pressure signal corresponding to the pressure in the environment. The system includes driver circuitry formed in the monolithic semiconductor substrate. The driver circuitry is responsive to input electrical signal for generating an output pressure signal. A conductive interconnect structure formed in the monolithic semiconductor substrate to electrically connects the pressure sensing device to the driver circuitry such that electrical pressure signals developed by the pressure sensing device are provided as input electrical signals to the driver circuitry.

Claims

1. A capacitive pressure sensing device formed on a semiconductor substrate that includes driver circuitry formed therein, the capacitive pressure sensing device comprising:

a conductive lower capacitor plate formed at an upper surface of the semiconductor substrate, the lower capacitor plate being conductively coupled to the driver circuitry;

a conductive pad formed at the upper surface of the semiconductor substrate and spaced-apart from the lower capacitor plate, the conductive pad being conductively coupled to the driver circuitry;

patterned dielectric material formed over the upper surface of the semiconductor substrate and having a first opening formed therein to expose an upper surface of the conductive pad and having a second opening formed therein over the lower capacitor plate;

a supporting layer of dielectric material formed on the patterned dielectric material, the supporting layer having a first opening formed therein over the conductive pad and having a plurality of openings formed therein over the second opening in the patterned dielectric material; and

an upper layer of conductive material formed on the supporting layer and extending through the first opening in the supporting layer and into the first opening in the patterned dielectric material to form electrical contact with the exposed upper surface of the conductive pad, the upper layer of conductive material extending over the plurality of openings formed in the supporting layer to close said openings to define an enclosed cavity between the lower capacitor plate and the upper conductive layer.

2. A capacitive pressure sensing device as in claim 1, and wherein

the supporting layer comprises silicon nitride;

and

the upper layer of conductive material comprises a metal.

3. A capacitive pressure sensing device as in claim 2, and wherein the metal comprises aluminum.

4. A capacitive pressure sensing device as in claim 1, and wherein the semiconductor substrate comprises crystalline silicon.

5. A capacitive pressure sensing device as in claim 4, and wherein the patterned dielectric material comprises:

a silicon nitride layer having an opening formed therein to expose the upper surface of the conductive pad and that extends over the lower capacitor plate; and

a silicon oxide layer formed on the silicon nitride layer and having a first opening formed therein to expose the upper surface of the conductive pad and a second opening formed therein over the lower capacitor plate.

6. A method of forming a capacitive pressure sensing device on a semiconductor substrate that includes driver circuitry formed therein, the method comprising;

forming a conductive lower capacitor plate at an upper surface of the semiconductor substrate, the lower capacitor plate being conductively coupled to the driver circuitry;

forming a conductive pad at the upper surface of the semiconductor substrate and spaced-apart from the lower capacitor plate, the conductive pad being conductively coupled to the driver circuitry;

forming dielectric material over the upper surface of the semiconductor substrate, the lower capacitor plate and the conductive pad;

patterning the dielectric material to have a first opening formed therein to expose an upper surface of the conductive pad and to have a second opening formed therein over the lower capacitor plate;

forming a supporting layer of dielectric material on the patterned dielectric material, the supporting layer having a first opening formed therein over the conductive pad and having a plurality of openings formed therein over the second opening in the patterned dielectric material; and

forming an upper layer of conductive material on the supporting layer and extending through the first opening in the supporting layer and into the first opening in the patterned dielectric material to form electrical contact with the exposed upper surface of the conductive pad, the upper layer of conductive material extending over the plurality of openings in the supporting layer to close said openings to define an enclosed cavity between the lower capacitor plate and the upper conductive layer.

7. A method as in claim 6, and wherein the upper layer of conductive material comprises aluminum.

8. A method as in claim 6, and wherein the semiconductor substrate comprises crystalline silicon.

9. A method as in claim 6, and wherein the step of forming the patterned dielectric material comprises:

forming a silicon nitride layer over the upper surface of the semiconductor substrate, the conductive pad and the lower capacitor plate;

forming an opening in the silicon nitride layer to expose the upper surface of the conductive pad;

forming a silicon oxide layer over the silicon nitride layer;

patterning the silicon oxide layer to form a first opening therein to expose the upper surface of the conductive pad and to form a second opening therein over the lower capacitor plate.