Four-phase charge pump circuit with reduced body effect

• US 7,123,077 B2
• Filed: 09/23/2004
• Issued: 10/17/2006
• Est. Priority Date: 08/03/2004
• Status: Active Grant

• Current Assignee: Ememory Technology Inc.
• Original Assignee: Ememory Technology Inc.
• Inventors: Chiu, Liang-Hsiang, Chang, Wu-Chang
• Primary Examiner(s): Nguyen, Linh My
• Assistant Examiner(s): Hiltunen, Thomas J
• Application Number:
  US10/947,677
• Publication Number:
  US 20060061410A1
• Time in Patent Office: 754 Days
• Field of Search: 327535-537, 363/60
• US Class Current: 327/536
• CPC Class Codes: H02M 3/073 Charge pumps of the Schenkel-type
• CPC Class Codes: H02M 3/075 including a plurality of stages and two sets of clock signals, one set for the odd and one set for the even numbered stages
• CPC Class Codes: H03K 2217/0018 Special modifications or use of the back gate voltage of a FET

Abstract

A charge pump circuit has an input stage, an output stage and multiple boosting stages coupled between the input stage and the output stage. The boosting stages are driven by four phase clock signals. Each boosting stage has two branch charge pumps, wherein each branch charge pump at least has a main pass transistor, a pre-charge transistor, two substrate transistors and capacitors. The substrate transistors and the main pass transistor are operated in association with the four phase clock signals to keep a potential of the body of the main pass transistors at a low level thus mitigating the body effect.

Claims

1. A four-phase charge pump circuit with reduced body effect comprising:

an input stage;

an output stage, which outputs a boosted voltage; and

multiple boosting stages coupled between the input stage and the output stage and driven by four phase clock signals;

each boosting stage comprising an upper branch charge pump and a lower branch charge pump, each branch charge pump further comprising;

a main pass transistor having a body, a gate terminal, a source terminal as a first node and a drain terminal as a second node, wherein the first node and the second node connect respectively to a front boosting stage and a rear boosting stage, and potential at the body is kept at a low level by the four phase clock signals;

a pre-charge transistor having a gate terminal, a source terminal and a drain terminal, wherein the drain terminal and the source terminal of the pre-charge transistor are coupled to the gate terminal of the main transistor and the second node;

the gate terminal of the pre-charge transistor is coupled to the first node of the main pass transistor;

two capacitors coupled respectively to the gate terminal of the main pass transistor and the first node; and

two substrate transistors, each of them having a body, a gate terminal, a source terminal and a drain terminal, wherein the source terminals and the bodies of the substrate transistors are connected together to the body of the main pass transistor, and the drain terminals of the substrate transistors are connected respectively to the first node and the second node of the main pass transistor;

wherein the gate terminal of one substrate transistor, whose drain terminal connects to the first node of the main pass transistor, is connected to the second node of the main pass transistor, and the gate of the other substrate transistor is connected to the second node of the main pass transistor of the other branch charge pump.

2. The charge pump circuit as claimed in claim 1, wherein the charge pump circuit is a negative charge pump circuit and the main pass transistors, the pre-charge transistors, and the substrate transistors are N-channel MOSFETs.

3. The charge pump circuit as claimed in claim 1, wherein the charge pump circuit is a positive charge pump circuit and the main pass transistors, the pre-charge transistors, and the substrate transistors are P-channel MOSFETs.

4. The charge pump circuit as claimed in claim 1, a body and the source terminal of the pre-charge transistor are connected together.

5. The charge pump circuit as claimed in claim 2, a body and the source terminal of the pre-charge transistor are connected together.

6. The charge pump circuit as claimed in claim 3, a body and the source terminal of the pre-charge transistor itself are connected together.