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RFID readers and RFID tags communicating using extensible bit vectors

  • US 7,123,171 B2
  • Filed: 02/06/2006
  • Issued: 10/17/2006
  • Est. Priority Date: 05/24/2004
  • Status: Active Grant
First Claim
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1. An integrated circuit (IC) for a Radio Frequency IDentification (RFID) tag that has an antenna arranged to receive a wireless wave, comprising:

  • circuitry that is arranged to generate a stream of bits from the wave;

    a memory; and

    a processing block that is arranged to;

    (a) isolate a group of the bits from the stream,(b) designate at least one of the isolated bits as an informing signal,(c) designate the remaining bits of the group as a word,(d) append the word to a previously similarly designated word for forming a reception block, and(e) if the informing signal does not equal a preset termination return to (a), else terminate appending and perform an action that uses the reception block as one of an address for the memory and content for the memory.

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