Multilayer metal gate electrode
First Claim
Patent Images
1. An integrated circuit comprising:
- a substrate;
a high dielectric constant gate dielectric over said substrate;
a metal barrier layer over said gate dielectric;
a U-shaped workfunction setting metal layer over said metal barrier layer;
a cap metal layer over said workfunction setting metal layer;
wherein said circuit is a complementary metal oxide semiconductor circuit including NMOS and PMOS transistors; and
wherein both the NMOS and PMOS transistors of said complementary metal oxide semiconductor circuit include the cap metal layer over the workfunction setting metal layer over the metal barrier layer over the gate dielectric.
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Abstract
A complementary metal oxide semiconductor integrated circuit may be formed with NMOS and PMOS transistors that have high dielectric constant gate dielectric material over a semiconductor substrate. A metal barrier layer may be formed over the gate dielectric. A workfunction setting metal layer is formed over the metal barrier layer and a cap metal layer is formed over the workfunction setting metal layer.
168 Citations
5 Claims
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1. An integrated circuit comprising:
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a substrate; a high dielectric constant gate dielectric over said substrate; a metal barrier layer over said gate dielectric; a U-shaped workfunction setting metal layer over said metal barrier layer; a cap metal layer over said workfunction setting metal layer; wherein said circuit is a complementary metal oxide semiconductor circuit including NMOS and PMOS transistors; and wherein both the NMOS and PMOS transistors of said complementary metal oxide semiconductor circuit include the cap metal layer over the workfunction setting metal layer over the metal barrier layer over the gate dielectric. - View Dependent Claims (2, 3, 4, 5)
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Specification