Wafer platen equipped with electrostatic clamp, wafer backside gas cooling, and high voltage operation capability for plasma doping

• US 7,126,808 B2
• Filed: 04/01/2004
• Issued: 10/24/2006
• Est. Priority Date: 04/01/2003
• Status: Active Grant

• Current Assignee: Varian Semiconductor Equipment Associates Incorporated (Applied Materials Incorporated)
• Original Assignee: Varian Semiconductor Equipment Associates Incorporated (Applied Materials Incorporated)
• Inventors: Koo, Bon-Woong, Scheuer, Jay T., Pedersen, Bjorn O., Mitchell, Erik A.
• Primary Examiner(s): Jackson, Stephen W.
• Assistant Examiner(s): WILLOUGHBY, TERRENCE RONIQUE
• Application Number:
  US10/816,289
• Publication Number:
  US 20040196616A1
• Time in Patent Office: 936 Days
• Field of Search: 361/234, 279/128
• US Class Current: 361/234
• CPC Class Codes: H01L 21/67069 for drying etching
• CPC Class Codes: H01L 21/67109 mainly by convection
• CPC Class Codes: H01L 21/6831 using electrostatic chucks
• CPC Class Codes: Y10T 279/23 with magnetic or electrostatic means

Abstract

An apparatus is provided for handling workpieces, such as semiconductor wafers, during semiconductor processing. The apparatus includes a wafer platen having a plurality of channels each extending from a top surface to a bottom surface of the wafer platen, a plurality of lift pins in alignment with the channels, and a mechanism for engaging the lift pins in a loading position of the workpiece, a clamping position of the workpiece so that desired semiconductor processes may be performed to the workpiece, and a lift off position for removing the workpiece from the wafer platen after the semiconductor processes are completed. The mechanism places the lift pins below the surface of the wafer platen in the load position and then raises the lift pins to a first predetermined distance above the surface of the wafer platen in the clamp position such that the first predetermined distance allows the workpiece to be clamped to the wafer platen. Then, the mechanism places the lift pins at a second predetermined distance above the surface of the wafer platen in the lift off position such that a workpiece removing device, such as a robotic arm, may be positioned between the workpiece and the wafer platen without contacting either surface.

Claims

1. An apparatus for handling a workpiece during semiconductor processing, comprising:

a wafer platen including a plurality of channels each extending from a top surface to a bottom surface of the wafer platen;

a plurality of lift pins in alignment with the channels; and

a mechanism for engaging the lift pins in a loading position of the workpiece, a clamping position for placing the workpiece in a position so that desired semiconductor processes may be performed to the workpiece, and a lift off position for removing the workpiece from the wafer platen after the desired semiconductor processes are completed, wherein each of the plurality of lift pins are also configured to provide a path for supplying a bias voltage from a bias source to the workpiece on the wafer platen said bias voltage having a potential not equal to ground potential.

2. An apparatus for handling a workpiece as defined in claim 1, wherein the mechanism places the lift pins below the top surface of the wafer platen in the load position.

3. An apparatus for handling a workpiece as defined in claim 1, wherein the mechanism places the workpiece at a distance above the surface of the wafer platen in the lift off position, the distance allowing a workpiece removing device to be positioned between the workpiece and the wafer platen without contacting either surface.

4. An apparatus for handling a workpiece as defined in claim 3, wherein the workpiece removing device comprises a robotic arm.

5. An apparatus for handling a workpiece as defined in claim 1, wherein the mechanism comprises first and second cylinders for engaging the lift pins in the load, clamp and lift off positions.

6. An apparatus for handling a workpiece as defined in claim 1, wherein the plurality of lift pins comprise three lift pins.

7. An apparatus for handling a workpiece as defined in claim 6, wherein the three lift pins are arranged in a triangular manner to stably support the workpiece.

8. An apparatus for handling a workpiece as defined in claim 1, wherein the plurality of lift pins comprise more than three lift pins.

9. An apparatus for handling a workpiece as defined in claim 1, wherein the lift pins comprise pointed tips.

10. An apparatus for handling a workpiece as defined in claim 1, wherein the lift pins comprise flattened tips.

11. An apparatus for handling a workpiece as defined in claim 1, wherein the lift pins comprise tungsten, aluminum, carbide, aluminum, nitride, graphite or titanium.

12. An apparatus for handling a workpiece as defined in claim 1, wherein the wafer platen comprises aluminum or ceramic materials.

13. An apparatus for handling a workpiece as defined in claim 1, further comprising a gas cooling controller for cooling a backside chamber between the workpiece and the wafer platen.

14. An apparatus for handling a workpiece as defined in claim 13, wherein the gas cooling controller comprises a gas source for supplying gas to the backside chamber, a pressure controller for regulating the pressure of the gas supplied to the backside chamber, an exhaust pump for exhausting gas from the backside chamber and a switch for switching between supplying gas and exhausting gas through a gas feed through in the wafer platen.

15. An apparatus for handling a workpiece as defined in claim 1, further comprising a plurality of electrical contacts on the top surface of the wafer platen.

18. An apparatus for handling a workpiece as defined in claim 1, wherein the desired semiconductor processes performed when the workpiece is in the clamped position comprises a plasma doping of ions into the workpiece.

19. An apparatus for handling a workpiece as defined in claim 18, wherein the bias voltage supplied to the workpiece determines an ion implantation energy of the ions.

20. An apparatus for handling a workpiece as defined in claim 19, wherein the bias voltage comprises a pulsed DC bias voltage.

16. A method for handling a workpiece during semiconductor processing, comprising:

loading the workpiece on a wafer platen;

engaging lift pins through channels of the wafer platen each extending from a top surface to a bottom surface of the wafer platen for positioning the workpiece in a clamping position;

engaging the lift pins through the channels of the wafer platen to lift the workpiece above the surface of the wafer platen for positioning the workpiece in a lift off position; and

supplying a bias voltage from a bias source to the workpiece through the lift pins said bias voltage having a potential not equal to ground potential.

17. A method for handling the workpiece as defined in claim 16, wherein the lift pins are placed below the surface of the wafer platen during the loading of the workpiece on the wafer platen.