X-tree test method and apparatus in a multiplexed digital system

• US 7,127,652 B2
• Filed: 06/03/2003
• Issued: 10/24/2006
• Est. Priority Date: 06/03/2003
• Status: Expired due to Fees

• Current Assignee: Agilent Technologies, Inc.
• Original Assignee: Agilent Technologies, Inc.
• Inventors: Hird, Stephen, Siefers, John, Norrgard, Dayton
• Primary Examiner(s): Decady, Albert
• Assistant Examiner(s): Trimmings, John P.
• Application Number:
  US10/453,386
• Publication Number:
  US 20040250190A1
• Time in Patent Office: 1,239 Days
• Field of Search: None
• US Class Current: 714/742
• CPC Class Codes: G01R 31/318502 Test of Combinational circuits
• CPC Class Codes: G01R 31/31926 Routing signals to or from the device under test [DUT], e.g. switch matrix, pin multiplexing

Abstract

An X-Tree test apparatus for testing combinatorial logic circuits in a multiplexed digital system. The apparatus includes a plurality of contacts for electrical connection with pins on a device under test. A first driver drives a logic one signal, and a second driver drives a logic zero signal, both of which are used for testing the device. Multiplexing circuitry selectively connects the first driver and the second driver with each of the plurality of contacts and device pins. A receiver, connected with the device under test, measures a response from the logic circuit under test to the logic one and zero signals to determine if it functions as intended.

Claims

1. An apparatus for testing a device under test, comprising:

a plurality of contacts for electrical connection with a device under test;

a first driver for driving a first logic signal;

a second driver for driving a second logic signal, having a different value from the first logic signal;

circuitry for selectively connecting the first driver and the second driver with each of the plurality of contacts; and

a receiver, connected with the device under test, for measuring a response from the device under test to the first logic signal and the second logic signal applied, respectively, from the first driver and the second driver via the circuitry.

2. The apparatus of claim 1 wherein the plurality of contacts are configured for electrical connection to a combinatorial logic circuit under test.

3. The apparatus of claim 1 wherein the circuitry is controllable to apply a particular pattern of logic signals to the device under test.

4. The apparatus of claim 1 wherein the plurality of contacts are configured for releasably contacting the device under test.

5. The apparatus of claim 1 wherein the response provides an indication relating to whether the device under test operates as designed.

6. The apparatus of claim 5, further including a module for comparing the response with a known response for the device under test.

7. A method for testing a device under test, comprising:

providing a plurality of contacts for electrical connection with a device under test;

driving a first logic signal to the device under test via the contacts;

driving a second logic signal to the device under test via the contacts, the second logic signal having a different value from the first logic signal;

selectively providing the first logic signal and the second logic signal to the device under test via the plurality of contacts; and

measuring a response from the device under test to the first logic signal and the second logic signal.

8. The method of claim 7 wherein the selectively providing step includes providing the first and second logic signals, via the contacts, to a combinatorial logic circuit under test.

9. The method of claim 7, further including applying a particular pattern of logic signals to the device under test.

10. The method of claim 7 wherein the providing step includes releasably connecting the contacts to the device under test.

11. The method of claim 7 wherein the measuring step includes outputting an indication relating to whether the device under test operates as designed.

12. The method of claim 11, further including comparing the response with a known response for the device under test.