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Dense arrays and charge storage devices

  • US 7,129,538 B2
  • Filed: 05/10/2004
  • Issued: 10/31/2006
  • Est. Priority Date: 08/14/2000
  • Status: Expired due to Term
First Claim
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1. A three dimensional nonvolatile device array, comprising:

  • a plurality of vertically separated device levels, each level comprising an array of TFT EEPROMs, each TFT EEPROM comprising a channel, source and drain regions, and a charge storage region adjacent to the channel region;

    a plurality of bit line columns in each device level, each bit line column contacting the source or the drain regions of the TFT EEPROMs;

    a plurality of word line rows in each device level; and

    at least one interlevel insulating layer located between the device levels;

    wherein the plurality of vertically separated device levels comprise a monolithic plurality of vertically separated device levels.

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