Dense arrays and charge storage devices
First Claim
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1. A three dimensional nonvolatile device array, comprising:
- a plurality of vertically separated device levels, each level comprising an array of TFT EEPROMs, each TFT EEPROM comprising a channel, source and drain regions, and a charge storage region adjacent to the channel region;
a plurality of bit line columns in each device level, each bit line column contacting the source or the drain regions of the TFT EEPROMs;
a plurality of word line rows in each device level; and
at least one interlevel insulating layer located between the device levels;
wherein the plurality of vertically separated device levels comprise a monolithic plurality of vertically separated device levels.
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Abstract
There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.
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Citations
20 Claims
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1. A three dimensional nonvolatile device array, comprising:
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a plurality of vertically separated device levels, each level comprising an array of TFT EEPROMs, each TFT EEPROM comprising a channel, source and drain regions, and a charge storage region adjacent to the channel region; a plurality of bit line columns in each device level, each bit line column contacting the source or the drain regions of the TFT EEPROMs; a plurality of word line rows in each device level; and at least one interlevel insulating layer located between the device levels; wherein the plurality of vertically separated device levels comprise a monolithic plurality of vertically separated device levels. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification